SLANTED GLASS EDGE FOR IMAGE SENSOR PACKAGE

    公开(公告)号:US20210384241A1

    公开(公告)日:2021-12-09

    申请号:US17326537

    申请日:2021-05-21

    Abstract: A digital image sensor package includes an image sensor substrate and a glass covering. The image sensor substrate carries photodiodes. The glass covering has a bottom surface, a top surface opposite the bottom surface, and a sidewall delimiting a perimeter edge of the glass covering. The glass covering overlies the photodiodes. A surface area of the top surface of the glass covering is greater than a surface area of the bottom surface of the glass covering such that the sidewall is anti-perpendicular to the top and bottom surfaces of the glass.

    WLCSP PACKAGE WITH DIFFERENT SOLDER VOLUMES

    公开(公告)号:US20210202419A1

    公开(公告)日:2021-07-01

    申请号:US17104968

    申请日:2020-11-25

    Inventor: David GANI

    Abstract: The present disclosure is directed to a wafer level chip scale package (WLCSP) with various combinations of contacts and Under Bump Metallizations (UBMs) having different structures and different amounts solder coupled to the contacts and UBMs. Although the contacts have different structures and the volume of solder differs, the total standoff height along the WLCSP remains substantially the same. Each portion of solder coupled to each respective contact and UBM includes a point furthest away from an active surface of a die of the WLCSP. Each point of each respective portion of solder is co-planar with each other respective point of the other respective portions of solder. Additionally, the contacts with various and different structures are positioned accordingly on the active surface of the die of the WLCSP to reduce failures that may result from the WLCSP being exposed to thermal cycling or the WLCSP being dropped.

    SEMICONDUCTOR PACKAGE WITH PROTECTED SIDEWALL AND METHOD OF FORMING THE SAME

    公开(公告)号:US20210159136A1

    公开(公告)日:2021-05-27

    申请号:US17145028

    申请日:2021-01-08

    Inventor: Yun LIU David GANI

    Abstract: A semiconductor package having a die with a sidewall protected by molding compound, and methods of forming the same are disclosed. The package includes a die with a first surface opposite a second surface and sidewalls extending between the first and second surfaces. A redistribution layer is formed on the first surface of each die. An area of the first surface of the die is greater than an area of the redistribution layer, such that a portion of the first surface of the die is exposed. When molding compound is formed over the die and the redistribution layer to form a semiconductor package, the molding compound is on the first surface of the die between an outer edge of the redistribution layer and an outer edge of the first surface. The molding compound is also on the sidewalls of the die, which provides protection against chipping or cracking during transport.

    OPTICAL SENSOR PACKAGE
    256.
    发明申请

    公开(公告)号:US20210080547A1

    公开(公告)日:2021-03-18

    申请号:US17015521

    申请日:2020-09-09

    Inventor: Jing-En LUAN

    Abstract: The present disclosure is directed to an optical sensor package with a first assembly and a second assembly with an encapsulant extending between and coupling the first assembly and the second assembly. The first assembly includes a first substrate, a first die on the first substrate, a transparent material on the first die, and an infrared filter on the transparent material. The second assembly includes a second substrate, a second die on the second substrate, a transparent material on the second die, and an infrared filter on the transparent material. Apertures are formed through the encapsulant aligned with the first die and the second die. The first die is configured to transmit light through one aperture, wherein the light reflects off an object to be detected and is received at the second die through another one of the apertures.

    MULTI-CHIP PACKAGE
    257.
    发明申请

    公开(公告)号:US20210035952A1

    公开(公告)日:2021-02-04

    申请号:US16935081

    申请日:2020-07-21

    Abstract: A multi-chip package including a first integrated circuit and a second integrated circuit. The first integrated circuit includes a first side having a first conductive layer, a second side having a second conductive layer, and an edge, the first conductive layer coupled to the second conductive layer at a location adjacent to the edge. The second integrated circuit is coupled to the second conductive layer of the first integrated circuit.

    Flexible electrochemical micro-sensor

    公开(公告)号:US10905362B2

    公开(公告)日:2021-02-02

    申请号:US16407054

    申请日:2019-05-08

    Abstract: A universal electrochemical micro-sensor can be used either as a biosensor or an environmental sensor. Because of its small size and flexibility, the micro-sensor is suitable for continuous use to monitor fluids within a live subject, or as an environmental monitor. The micro-sensor can be formed on a reusable glass carrier substrate. A flexible polymer backing, together with a set of electrodes, forms a reservoir that contains an electrolytic fluid chemical reagent. During fabrication, the glass carrier substrate protects the fluid chemical reagent from degradation. A conductive micromesh further contains the reagent while allowing partial exposure to the ambient biological or atmospheric environment. The micromesh density can be altered to accommodate fluid reagents having different viscosities. Flexibility is achieved by attaching a thick polymer tape and peeling away the micro-sensor from the glass carrier substrate. The final structure is thereby transferred to the polymer tape, providing a flexible product.

    Integrated circuit (IC) package with a solder receiving area and associated methods

    公开(公告)号:US10529652B2

    公开(公告)日:2020-01-07

    申请号:US16380591

    申请日:2019-04-10

    Inventor: Wing Shenq Wong

    Abstract: A single chip integrated circuit (IC) package includes a die pad, and a spacer ring on the die pad defining a solder receiving area. A solder body is on the die pad within the solder receiving area. An IC die is on the spacer ring and is secured to the die pad by the solder body within the solder receiving area. Encapsulating material surrounds the die pad, spacer ring, and IC die. For a multi-chip IC package, a dam structure is on the die pad and defines multiple solder receiving areas. A respective solder body is on the die pad within a respective solder receiving area. An IC die is within each respective solder receiving area and is held in place by a corresponding solder body. Encapsulating material surrounds the die pad, dam structure, and plurality of IC die.

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