-
公开(公告)号：US20220301616A1
公开(公告)日：2022-09-22
申请号：US17206090
申请日：2021-03-18
Inventor： Shu-Han Nien
IPC: G11C11/4093 , H03F3/45 , H03F1/02
Abstract: An amplifier with an input stage comprising: a first current mirror; a first input differential pair; a first current source; a second current source; a second input differential pair, wherein the first input differential pair and the second input differential pair receive a reference voltage; a second current mirror; and a voltage control transmission circuit. An extra current path in the first current mirror is formed and a current flowing through the extra current path flows through the second current mirror to a ground when the reference voltage is higher than a first predetermined value. Also, an extra current path in the second current mirror is formed and a current flowing through the extra current path in the second current mirror flows to the first current mirror when the reference voltage is lower than a second predetermined value.
-
公开(公告)号：US11387800B1
公开(公告)日：2022-07-12
申请号：US17319084
申请日：2021-05-12
Inventor： Jung-Kuei Chang
Abstract: A parametric equalizer includes a first parametric equalizer circuit, a second parametric equalizer circuit, a first multiplication circuit, a second multiplication circuit, an addition circuit, and a weighting control circuit. The first parametric equalizer circuit processes an input signal to output a first output signal. The second parametric equalizer circuit processes the input signal to output a second output signal. The first multiplication circuit multiplies the first output signal and a first weighting value to generate a first adjusted output signal. The second multiplication circuit multiplies the second output signal and a second weighting value to generate a second adjusted output signal. The addition circuit combines the first adjusted output signal and the second adjusted output signal to generate an equalizer output signal. The weighting control circuit dynamically adjusts the first weighting value and the second weighting value according to the equalizer output signal.
-
公开(公告)号：US20220139479A1
公开(公告)日：2022-05-05
申请号：US17088608
申请日：2020-11-04
Inventor： Yu-Tao Lin , Tse-Hua Yao , Yi-Fan Chen
Abstract: A memory test circuit comprising: a first latch circuit for receiving a first input address and an error indication signal to generate a first address; a first E-fuse group for receiving the first address to generate an output address; a second latch circuit for receiving the error indication signal; a second E-fuse group for generating an error indication signal according to an output of the second latch circuit which is generated according to the fault indication signal; and a comparison circuit for activating the second latch circuit according to a relation between the first address and a second input address and a state of the first latch circuit or the first E-fuse group.
-
公开(公告)号：US11264963B1
公开(公告)日：2022-03-01
申请号：US16993292
申请日：2020-08-14
Inventor： Cheng-Hung Tsai , Chien-Yi Chang
IPC: H03F3/45
Abstract: An input buffer circuit includes an input differential amplifier unit, a differential amplifier stage, and a buffer. The input differential amplifier unit has input terminals and at least one output terminal, wherein at least two of the input terminals of the input differential amplifier unit are configured to be capacitively coupled respectively so as to provide at least one pair of signal paths for a first input signal and a second input signal of a differential input signal. The differential amplifier stage, coupled to the input differential amplifier unit, has first and second differential input terminals, and a corresponding output terminal, wherein the first and second differential input terminals are capable of being coupled to the first input signal and the second input signal respectively. The buffer, coupled to the output terminal of the differential amplifier stage, is used for outputting an output single-ended signal.
-
公开(公告)号：US11127477B1
公开(公告)日：2021-09-21
申请号：US17076827
申请日：2020-10-22
Inventor： Tse-Hua Yao , Yi-Fan Chen
Abstract: An E-fuse circuit comprising: an E-fuse group, comprising a plurality of E-fuse sections, wherein each one of the E-fuse sections comprises a plurality of E-fuses; a multi-mode latch circuit, configured to receive an input signal to generate a first output signal in a burn in mode, and configured to receive an address to be compared to generate a second output signal in a normal mode; a first logic circuit group, configured to receive a first part of bits of the first output signal to generate a control signal in the burn in mode; and a second logic circuit group, configured to receive the control signal and a second part of bits of the first output signal to generate a selection signal in the burn in mode, to select which one of the E-fuse sections is activated.
-
Patent Agency Ranking
公开(公告)号：US11121682B1
公开(公告)日：2021-09-14
申请号：US17012072
申请日：2020-09-04
Inventor： Che-Wei Hsu , Wun-Long Yu , Deng-Yao Shih
Abstract: A boost class-D amplifier includes a PWM modulator, a boost level controller coupled to the PWM modulator, a pre-driver coupled to the PWM modulator and the boost level controller, a system voltage source, an inductor coupled to the system voltage source, a first switch, a second switch, a third switch, a fourth switch, a first diode coupled between the third switch and a voltage ground, a second diode coupled between the fourth switch and the voltage ground, and a capacitor coupled between the first switch and the fourth switch. The PWM modulator is for receiving an input signal and generating a first modulated signal accordingly. The boost level controller is for receiving the first modulated signal and generating a second modulated signal accordingly. The pre-driver is for receiving the first modulated signal and the second modulated signal and generating control signals accordingly.
-
公开(公告)号：US20250097637A1
公开(公告)日：2025-03-20
申请号：US18469573
申请日：2023-09-19
Inventor： HSIN-YUAN CHIU , TSUNG-FU LIN , WUN-LONG YU
Abstract: Circuit, method for audio signal processing with excursion estimation compensation, and non-transitory storage medium are provided. The circuit comprises a delay circuit, compensation filter, excursion estimator, peak detector, gain determination circuit, and gain adjustment circuit. The delay circuit is for delaying a digital audio signal to output a delayed digital audio signal. The compensation filter is for generating a compensated digital audio signal according to the digital audio signal for excursion estimation compensation for a speaker type. The excursion estimator is for determining an estimated excursion signal for the speaker type according to the compensated digital audio signal. The gain determination circuit is for generating a gain setting signal according to the estimated excursion signal and a threshold value. The gain adjustment circuit is for generating an adjusted digital audio signal according to the gain setting signal and delayed digital audio signal.
-
公开(公告)号：US20250088150A1
公开(公告)日：2025-03-13
申请号：US18464290
申请日：2023-09-11
Inventor： ISAAC Y. CHEN
Abstract: A load detection device includes a signal output circuit, comparison circuit, sensing circuit, detection circuit, logic circuit, and control circuit. The signal output circuit outputs a forced current, and generates a bias signal, a first output signal, a second output signal, and a feedback signal depending on the forced current. The comparison circuit compares the reference signal output with the first and second output signals to generate an accurate comparison output for indicating the load state. The sensing circuit generates a sensing signal according to the feedback signal. The detection circuit generates a rough detection output for indicating the load state according to the sensing signal and the first and second output signals. The logic circuit obtains the load state according to the precise comparison output and the rough detection output. The control circuit enables the signal output circuit, comparison circuit, sensing circuit, and logic circuit.
-
29.发明授权公开(公告)号：US12184246B2
公开(公告)日：2024-12-31
申请号：US17568732
申请日：2022-01-05
Inventor： Che-Wei Hsu , Wun-Long Yu
Abstract: A driving circuit of a loudspeaker includes a periodic signal generation circuit, a signal processing circuit, a class-D amplifier circuit, a current sensing circuit, and a sample and hold circuit. The periodic signal generation circuit is arranged to generate a periodic signal and a control signal. The signal processing circuit is coupled to the periodic signal generation circuit, and is arranged to generate a pre-driving signal. The class-D amplifier circuit is coupled to the signal processing circuit, and is arranged to drive the loudspeaker according to the pre-driving signal. The current sensing circuit is coupled to the class-D amplifier circuit, and is arranged to generate a current sensing signal. The sample and hold circuit is coupled to the periodic signal generation circuit and the current sensing circuit, and is arranged to sample and hold the current sensing signal according to the control signal, to generate a current sampling signal.
-
公开(公告)号：US12166372B2
公开(公告)日：2024-12-10
申请号：US17561685
申请日：2021-12-23
Inventor： Yao-Wei Yang
IPC: H02J7/00
Abstract: A linear charger includes a constant current charging circuit and a thermal regulation circuit. The constant current charging circuit is arranged to generate a charging current, and includes a first transconductance amplifier, wherein the first transconductance amplifier has a positive terminal, a negative terminal, and an output terminal. The thermal regulation circuit is coupled to the output terminal and the negative terminal of the first transconductance amplifier, and is arranged to generate and modulate a thermal regulation current and an amplifier reference voltage with temperature, and transmit the thermal regulation current and the amplifier reference voltage to the output terminal and the negative terminal of the first transconductance amplifier, respectively.
-
-
-
-
-
-
-
-
-
Search Results
78
records
(took 0.095 seconds)
