公开(公告)号：US06665228B2

公开(公告)日：2003-12-16

申请号：US10166962

申请日：2002-06-11

申请人： Alexander Benedix ,  Sebastian Kuhne ,  Helmut Fischer ,  Bernd Klehn ,  Helmut Schneider

发明人： Alexander Benedix ,  Sebastian Kuhne ,  Helmut Fischer ,  Bernd Klehn ,  Helmut Schneider

IPC分类号： G11C800

CPC分类号： G11C11/4087 ,  G11C8/14

摘要： An integrated memory has a memory cell array, which is subdivided into a plurality of separate segments. A first and a second local word line in different segments together form a common global word line. The global word line is decoded via a row decoder. The first and second local word lines are connected to a column decoder in such a way that they can be decoded individually and segment by segment in a manner dependent on a column address. The memory thus allows fast and current-saving activation of a word line.