Driving device for liquid crystal display panel and liquid crystal display device
    21.
    发明授权
    Driving device for liquid crystal display panel and liquid crystal display device 有权
    液晶显示面板驱动装置及液晶显示装置

    公开(公告)号:US08159434B2

    公开(公告)日:2012-04-17

    申请号:US11688029

    申请日:2007-03-19

    申请人: Hiroaki Kimura

    发明人: Hiroaki Kimura

    IPC分类号: G09G3/36

    摘要: A liquid crystal display panel driving device is provided which is capable of reliably improving a response speed of a liquid crystal and of obtaining good display quality. When overshooting driving is performed in a current frame for displaying, an excessive response level in a next frame is predicted based on a combination of a gray level in one past frame and a gray level in a current frame and, when an excessive response is predicted, a corrected gray-level value to prevent (or to cancel) the excessive response is calculated in advance. By applying a voltage corresponding to the corrected gray-level value, an excessive response in a next frame can be suppressed. Irrespective of whether or not an excessive response is predictable in a next frame, an overshooting driving can be performed at an applied voltage sufficiently corresponding to a target gray-level value and, as a result, a response speed of a liquid crystal can be reliably made high and good display quality can be obtained.

    摘要翻译: 提供一种能够可靠地提高液晶的响应速度并获得良好的显示质量的液晶显示面板驱动装置。 当在当前显示画面中执行过冲驱动时,基于当前帧中的一个过去帧中的灰度级和灰度级的组合来预测下一帧中的过度响应级别,并且当预测过度响应时 预先计算防止(或取消)过度响应的校正灰度值。 通过施加与校正灰度值相对应的电压,可以抑制下一帧中的过度响应。 无论在下一帧中是否可以预测到过度响应,可以以足够对应于目标灰度值的施加电压进行过冲驱动,结果可以可靠地获得液晶的响应速度 可以获得高质量和良好的显示质量。

    Device and method for controlling belt-type continuously variable transmission
    22.
    发明授权
    Device and method for controlling belt-type continuously variable transmission 失效
    控制带式无级变速器的装置及方法

    公开(公告)号:US07988573B2

    公开(公告)日:2011-08-02

    申请号:US11100488

    申请日:2005-04-07

    IPC分类号: F16H63/00

    CPC分类号: F16H61/66272

    摘要: A control device includes an arrangement for deriving an input torque input to a belt-type continuously variable transmission based on a control amount of a first actuator. The continuously variable transmission includes a first actuator that is provided on a one movable sheave side, that presses the one movable sheave toward one fixed sheave, and that can generate a belt pinching pressure on the one movable sheave side, and a second actuator and a torque cam that are provided on the other movable sheave side, that press the other movable sheave toward the other fixed sheave, and that can generate a belt pinching pressure on the other movable sheave side.

    摘要翻译: 控制装置包括用于基于第一致动器的控制量导出输入到带式无级变速器的输入转矩的装置。 无级变速器包括设置在一个可动滑轮侧的第一致动器,其将一个可动滑轮朝向一个固定滑轮按压,并且可在一个可动滑轮侧产生皮带夹紧压力,并且第二致动器和 设置在另一个可动滑轮侧的扭矩凸轮,将另一个可动滑轮朝另一个固定滑轮按压,并且在另一个可动滑轮侧产生皮带夹紧压力。

    CACHE MEMORY DEVICE, PROCESSOR, AND CONTROL METHOD FOR CACHE MEMORY DEVICE
    23.
    发明申请
    CACHE MEMORY DEVICE, PROCESSOR, AND CONTROL METHOD FOR CACHE MEMORY DEVICE 有权
    用于缓存存储器件的缓存存储器件,处理器和控制方法

    公开(公告)号:US20110004730A1

    公开(公告)日:2011-01-06

    申请号:US12826967

    申请日:2010-06-30

    申请人: Hiroaki Kimura

    发明人: Hiroaki Kimura

    CPC分类号: G06F12/0893 Y02D10/13

    摘要: A cache memory device that connects an instruction controlling unit outputting a memory access request for requesting data and a storage device storing data, the cache memory device including: a data memory unit that holds data for each cache line, a tag memory unit that holds, for each cache line linked with a cache line of the data memory unit, tag addresses specifying storage positions of data covered by the memory access request at the storage device and status data indicating states of the data of the data memory unit corresponding to the tag addresses, a search unit that searches for a cache line of the tag memory unit corresponding to an index address included in the memory access request, a comparison unit that compares a tag address held in the found cache line of the tag memory unit and a tag address included in the memory access request and, when the two do not match, detects a “cache miss” and reads out the status information of the found cache line, and a controlling unit that, when the comparison unit detects a cache miss, requests data covered by the memory access request to the storage device and, when the cache line storing the data requested at the storage device is not present in the data memory unit, stops the supply of a clock to the data memory unit based on the status information of the cache line that the comparison unit read out.

    摘要翻译: 一种高速缓冲存储器装置,其连接输出用于请求数据的存储器访问请求的指令控制单元和存储数据的存储装置,所述高速缓冲存储器装置包括:数据存储单元,其保存每个高速缓存行的数据;标签存储单元, 对于与数据存储器单元的高速缓存行链接的每个高速缓存行,指定存储设备上由存储器访问请求覆盖的数据的存储位置的标签地址和指示对应于标签地址的数据存储单元的数据的状态的状态数据 搜索单元,其搜索与存储器访问请求中包括的索引地址相对应的标签存储单元的高速缓存行;比较单元,其将保存在标签存储单元的找到的高速缓存行中的标签地址与标签地址 包括在存储器访问请求中,并且当两者不匹配时,检测“高速缓存未命中”并读出所找到的高速缓存行的状态信息,并且控制u 当比较单元检测到高速缓存未命中时,向存储设备请求由存储器访问请求覆盖的数据,并且当存储在存储设备中请求的数据的高速缓存行不存在于数据存储单元中时,停止供应 基于比较单元读出的高速缓存行的状态信息,将时钟发送到数据存储单元。

    Arithmetic processor, information processing apparatus and memory access method in arithmetic processor
    24.
    发明授权
    Arithmetic processor, information processing apparatus and memory access method in arithmetic processor 有权
    算术处理器,信息处理装置和算术处理器中的存储器访问方法

    公开(公告)号:US07797494B2

    公开(公告)日:2010-09-14

    申请号:US12061875

    申请日:2008-04-03

    申请人: Hiroaki Kimura

    发明人: Hiroaki Kimura

    IPC分类号: G06F12/00

    摘要: In an information processing apparatus of this invention having a cache memory, a TLB and a TSB, a second retrieval unit retrieves a second physical address from an address translation buffer by using a second virtual address corresponding one-to-one to a first virtual address, and a prefetch controller enters a first address translation pair of the first virtual address from an address translation table into a cache memory by using a second physical address which is a result of the retrieval, thereby largely shortening the processing time of a memory access when a TLB miss occurs at the time of the memory access.

    摘要翻译: 在具有高速缓冲存储器,TLB和TSB的本发明的信息处理装置中,第二检索单元通过使用与第一虚拟地址一一对应的第二虚拟地址从地址转换缓冲器检索第二物理地址 ,并且预取控制器通过使用作为检索结果的第二物理地址将第一虚拟地址的第一地址转换对从地址转换表输入到高速缓冲存储器中,从而大大缩短存储器访问的处理时间 在存储器访问时发生TLB未命中。

    Arithmetic processing unit and entry control method
    25.
    发明申请
    Arithmetic processing unit and entry control method 失效
    算术处理单元和入口控制方法

    公开(公告)号:US20100106938A1

    公开(公告)日:2010-04-29

    申请号:US12654309

    申请日:2009-12-16

    申请人: Hiroaki Kimura

    发明人: Hiroaki Kimura

    IPC分类号: G06F12/10

    摘要: An arithmetic processing apparatus includes: a plurality of TLBs holding as entries a portion of a conversion table for conversion of virtual addresses into physical addresses that has been placed in a main memory unit; an entry registration determining unit that, while registering an entry output from the main memory unit in any one of a plurality of TLBs, determines whether an entry has already been registered in an area of a TLB as registration destination; and a relocation control unit that, when the entry registration determining unit determines that an entry has already been registered in the area of the TLB as registration destination, evicts the entry that has already been registered and registers evicted entry in other TLB.

    摘要翻译: 算术处理装置包括:多个TLB,其将虚拟地址转换为已经被放置在主存储单元中的物理地址的转换表的一部分保存为条目; 条目登记确定单元,在多个TLB中的任何一个中登记从主存储器单元输出的条目时,确定条目是否已经登记在TLB的区域中作为登记目的地; 以及重新定位控制单元,当所述入口登记确定单元确定已经在所述TLB的区域中已经登记了条目作为注册目的地时,将已经被注册的条目驱逐出去并登记在其他TLB中。

    RELAY APPARATUS, COMMUNICATION TERMINAL, AND COMMUNICATION METHOD
    27.
    发明申请
    RELAY APPARATUS, COMMUNICATION TERMINAL, AND COMMUNICATION METHOD 有权
    继电器,通信终端和通信方法

    公开(公告)号:US20090046621A1

    公开(公告)日:2009-02-19

    申请号:US12101267

    申请日:2008-04-11

    IPC分类号: H04B7/14

    摘要: A relay apparatus (110) includes a communication I/F (113) that receives an IP packet from a source terminal (120A) via a communication network (101), a broadcast wave interface (114) that transmits the IP packet received via the communication network I/F (113) to a destination terminal (120B) by a digital broadcast wave, and a receiving and transmitting unit (111) that transmits the IP packet that is received by the communication I/F (113) and transmitted by the transmitting communication terminal (120A) to the destination terminal (120B) via the broadcast wave I/F (114).

    摘要翻译: 中继装置(110)包括经由通信网络(101)从源终端(120A)接收IP分组的通信I / F(113​​),发送经由通信网络接收的IP分组的广播波接口(114) 通信网络I / F(113​​)通过数字广播波到目的地终端(120B);以及接收和发送单元(111),其发送由通信I / F(113​​)接收并由 发送通信终端(120A)经由广播波I / F(114)发送到目的地终端(120B)。

    Continuous crystallization process
    28.
    发明授权
    Continuous crystallization process 有权
    连续结晶过程

    公开(公告)号:US07034191B2

    公开(公告)日:2006-04-25

    申请号:US11057372

    申请日:2005-02-15

    IPC分类号: C07L37/68

    CPC分类号: C07C37/84 C07C39/16

    摘要: A continuous crystallization process comprising the steps of supplying a crystallization material containing bisphenol A to a crystallizer to form crystals of an adduct of bisphenol A and phenol or crystals of bisphenol A, subjecting the slurry discharged from the crystallizer to solid/liquid separation, and recovering the crystals, wherein part of the mother liquor is circulated to the crystallizer. According to this process, the heat duty to be removed is reduced, deposition of solids on the inner surfaces of the crystallizer, particularly on the heat transferring surface of the cooler is restrained, and consequently the continuous operating time of the apparatus is prolonged.

    摘要翻译: 一种连续结晶方法,包括以下步骤:向结晶器提供含有双酚A的结晶材料,以形成双酚A和苯酚或双酚A晶体的加合物的晶体,使从结晶器排出的浆液进行固/液分离,并回收 晶体,其中部分母液循环至结晶器。 根据该方法,减少了要去除的热负荷,从而抑制了结晶器的内表面,特别是冷却器的传热表面上的固体沉积,从而延长了设备的连续工作时间。

    Apparatus for analyzing software and method of the same
    29.
    发明授权
    Apparatus for analyzing software and method of the same 有权
    用于分析软件的装置及其方法

    公开(公告)号:US06996516B1

    公开(公告)日:2006-02-07

    申请号:US09241735

    申请日:1999-02-02

    IPC分类号: G06F9/45

    CPC分类号: G06F8/75

    摘要: An apparatus has program analysis information generation device for automatically generating program analysis information by analyzing a computer program, and program analysis information storage device for sequentially storing the generated program analysis information in a predetermined data recording medium in arbitrary units. A plurality of kinds of program analysis information generated by the program analysis information generation device are stored in the data recording medium as a database every time individual analysis information is obtained. Hence, upon obtaining program analysis information for a large-scale program, even when the memory capacity that can be mounted on a computer is limited, target program analysis information can be reliably obtained without encountering any memory shortage during analysis.

    摘要翻译: 一种装置具有通过分析计算机程序来自动生成程序分析信息的程序分析信息生成装置和用于以任意单位顺序地将所生成的程序分析信息存储在预定数据记录介质中的程序分析信息存储装置。 每当获得单独的分析信息时,由程序分析信息生成装置生成的多种程序分析信息作为数据存储在数据记录介质中。 因此,在获得大规模程序的程序分析信息时,即使在计算机上能够安装的存储器容量有限的情况下,也能可靠地获得目标程序分析信息,而不会在分析过程中遇到任何内存不足。