公开(公告)号：US5467354A

公开(公告)日：1995-11-14

申请号：US126653

申请日：1993-09-27

申请人： Hisashi Yamauchi

发明人： Hisashi Yamauchi

IPC分类号： G01R31/28 ,  G01R31/3185 ,  G06F11/267 ,  H03K3/037 ,  H04Q9/00 ,  G01R31/00

CPC分类号： G01R31/318525 ,  G01R31/318541 ,  G01R31/318555 ,  H03K3/0375 ,  G06F11/2215

摘要： In a scan path so configured that a series of tests using a scan path are performed by a scan shift of shifting the data of a scan path flipflop and a normal circuit test of testing a circuit for a normal operation by using the shifted data, and that at the time of the scan path testing, the scan path flipflop fetches data at a first timing and outputs the fetched data at a second timing, there is provided a scan path test control circuit which includes a control circuit so constructed to generate a logical value which never either sets or resets the scan path flipflop at the time of the scan shifting, and a logical value of validating a normal logic which sets or resets the scan path flipflop after the scan shifting. The test control circuit also generates, at the time of the normal test, a logic value which neither sets nor resets the scan path flipflop in synchronism with a timing signal between the first timing after the data is fetched and the second timing.

摘要翻译： 在如此配置的扫描路径中，使用扫描路径的一系列测试是通过使用移位数据通过移动扫描路径触发器的数据的扫描移位和用于正常操作的电路测试的正常电路测试执行的，以及 在扫描路径测试时，扫描路径触发器在第一定时取出数据，并在第二定时输出所提取的数据，提供了一种扫描路径测试控制电路，其包括被构造为产生逻辑的控制电路 在扫描移位时从不设置或复位扫描路径触发器的值，以及验证在扫描移位之后设置或复位扫描路径触发器的正常逻辑的逻辑值。 测试控制电路还在正常测试时产生既不设置也不复位扫描路径触发器的逻辑值，与在获取数据之后的第一定时与第二定时之间的定时信号同步。