公开(公告)号：US08116668B2

公开(公告)日：2012-02-14

申请号：US12470726

申请日：2009-05-22

申请人： Masato Koyanagi ,  Shinji Katagiri ,  Masahiro Yoshida ,  Kazunori Hashimoto ,  Hisashi Yamauchi

发明人： Masato Koyanagi ,  Shinji Katagiri ,  Masahiro Yoshida ,  Kazunori Hashimoto ,  Hisashi Yamauchi

IPC分类号： G03G15/09

CPC分类号： G03G15/0808

摘要： A toner supplying roller which is used in a developing apparatus and has the following characteristics: (1) an average diameter of a foam cell opening portion on a surface of a foam elastic member is 100 to 800 μm, (2) an unopened cell closed by a skin layer of a film thickness of 50 μm or less is present in the surface of the foam elastic member, and (3) assuming that a surface area of the foam elastic member is A, a total area of the foam cell opening portions is B, and a surface area of the unopened cell is C, the following relationship is satisfied: B A + 0.2 ≦ B + C A ≦ 0.95 .

摘要翻译： 一种用于显影装置中的调色剂供应辊，具有以下特点：（1）泡沫弹性构件表面上泡沫单元开口部分的平均直径为100至800μm，（2）未打开的电池封闭 通过在泡沫弹性体的表面存在膜厚为50μm以下的皮肤层，（3）假设泡沫弹性体的表面积为A，泡沫单元开口部的总面积 是B，未开封单元的表面积为C，满足以下关系：BA + 0.2＆nlE; B + C A＆nlE; 0.95。

公开(公告)号：US20100303486A1

公开(公告)日：2010-12-02

申请号：US12791412

申请日：2010-06-01

申请人： Masahiro Shibata ,  Masahiro Yoshida ,  Kazunori Hashimoto ,  Kazuhiro Okubo ,  Hisashi Yamauchi

发明人： Masahiro Shibata ,  Masahiro Yoshida ,  Kazunori Hashimoto ,  Kazuhiro Okubo ,  Hisashi Yamauchi

IPC分类号： G03G15/08 ,  G03G15/00

CPC分类号： G03G15/065 ,  G03G15/0808

摘要： An image forming apparatus includes a toner carrying member for supplying toner to the image bearing member to visualize the latent image; a rotatable toner supply member, contacted to the toner carrying member, for supplying the toner to the toner carrying member, the toner supply member including a surface foam layer; a voltage applying device for applying voltages to the toner carrying member and the toner supply member; a controller for controlling the voltage application apparatus such that A and B have a polarity which is the same as a regular charging polarity of the toner, where A=Vs2−Vd2; B=(Vs2−Vd2)−(Vs1−Vd1); Vd1 is a voltage applied to the toner carrying member during a period in which the latent image is visualized; Vs1 is a voltage applied to the toner supplying member during the period; vd2 is a voltage applied to the toner carrying member during at least a part of a period which is after the visualization of the latent image and before stoppage of rotation of the toner supplying member; and Vs2 is a voltage applied to the toner supplying member during the at least the part of the period.

摘要翻译： 图像形成装置包括用于向图像承载部件供应调色剂以使潜像可视化的调色剂承载部件; 与所述调色剂承载构件接触的用于将调色剂供给到所述调色剂承载构件的可旋转调色剂供给构件，所述调色剂供给构件包括表面泡沫层; 电压施加装置，用于向调色剂承载构件和调色剂供应构件施加电压; 用于控制电压施加装置的控制器，使得A和B具有与调色剂的常规充电极性相同的极性，其中A = Vs2-Vd2; B =（Vs2-Vd2） - （Vs1-Vd1）; Vd1是在潜像可视化的期间中施加到调色剂承载构件的电压; Vs1是在该期间施加到调色剂供给构件的电压; vd2是在潜像的可视化之后和在调色剂供给构件的停止转动之前的期间的至少一部分期间施加到调色剂承载构件的电压; Vs2是在该周期的至少一部分期间施加到调色剂供给部件的电压。

公开(公告)号：US20100254205A1

公开(公告)日：2010-10-07

申请号：US12662040

申请日：2010-03-29

申请人： Hisashi Yamauchi

发明人： Hisashi Yamauchi

IPC分类号： G11C29/04 ,  G11C17/16

CPC分类号： G11C17/18 ,  G11C17/16 ,  G11C17/165 ,  G11C29/44 ,  G11C29/4401 ,  G11C29/785 ,  G11C2029/4402

摘要： Provided is an integrated circuit including: multiple memory cells; a redundant memory having a function of repairing a defective cell included in the multiple memory cells by placing a corresponding fuse among multiple fuses into a first state; a fuse data conversion circuit that generates first information of a first defective cell based on position information of the fuse placed into the first state corresponding to the first defective cell having been repaired; a repair data generation circuit that generates, upon detection of a second defective cell as a result of a test for the multiple memory cells, repair information for repairing the second defective cell according to the first information and second information of the second defective cell; and a fuse state change circuit that places a predetermined fuse among the multiple fuses into the first state according to the repair information generated by the repair data generation circuit.

摘要翻译： 提供了一种集成电路，包括：多个存储单元; 具有通过将多个保险丝之间的对应保险丝置于第一状态来修复包括在多个存储单元中的有缺陷单元的功能的冗余存储器; 熔丝数据转换电路，其根据与已修复的第一有缺陷单元对应的第一状态的熔丝的位置信息，生成第一缺陷单元的第一信息; 修复数据生成电路，根据所述第二有缺陷单元的第一信息和第二信息，在检测到作为所述多个存储单元的测试结果的第二缺陷单元的检测结果时，生成用于修复所述第二缺陷单元的修复信息; 以及保险丝状态改变电路，其根据由修复数据生成电路生成的修复信息，将多个保险丝内的规定的熔丝置于第一状态。

公开(公告)号：US20070033462A1

公开(公告)日：2007-02-08

申请号：US11480455

申请日：2006-07-05

申请人： Hisashi Yamauchi

发明人： Hisashi Yamauchi

IPC分类号： G01R31/28

CPC分类号： G01R31/318544 ,  G11C29/32 ,  G11C2029/3202

摘要： A test method sets a write value to a scan flip-flop for setting a value to a memory to be tested. It then performs a series of shift operation in scan paths until setting of a read value is completed. During the shift operation, a value for refresh operation is added to the value passing through the flip-flop for setting a value to the memory to be tested.

摘要翻译： 测试方法将扫描触发器的写入值设置为要测试的存储器的值。 然后在扫描路径中执行一系列移位操作，直到读取值的设置完成。 在移位操作期间，将刷新操作的值添加到通过触发器的值，以将值设置到要测试的存储器。

公开(公告)号：US06105156A

公开(公告)日：2000-08-15

申请号：US053479

申请日：1998-04-01

申请人： Hisashi Yamauchi

发明人： Hisashi Yamauchi

IPC分类号： G01R31/30 ,  G01R31/3193 ,  G01R3/28

CPC分类号： G01R31/3193 ,  G01R31/3004

摘要： An LSI tester having a path analysis means for tracing a series of connections reversely along a designated signal flow path from one of flip-flops of DUT (device under test) at which flip-flop an inconsistency in pattern value has been detected as a consistency detection point by an output pattern comparator, based on circuit information in DUT, and for identifying firstly reachable flip-flops or external terminals from the inconsistency detection point as arrival points. And a sequence-pattern-inverting means sequentially inverts at least partly the values of successive test patterns one at a time with respect to each of the arrival points. The fault position in DUT is narrowed down from the arrival points simply in a shorter time.

摘要翻译： 一种LSI测试器，具有路径分析装置，用于沿着指定的信号流路径从DUT（被测设备）的触发器之一反向跟踪一系列连接，在该触发器上触发器已经检测到模式值的不一致性作为一致性 基于DUT中的电路信息的输出模式比较器的检测点，以及用于将来自不一致性检测点的第一可触发的触发器或外部终端识别为到达点。 并且序列模式反转装置至少部分地相对于每个到达点一次一个地反转连续测试图案的值。 DUT中的故障位置仅在较短的时间内从到达点变窄。

公开(公告)号：US4287541A

公开(公告)日：1981-09-01

申请号：US43734

申请日：1979-05-30

申请人： Makoto Tanahashi ,  Hisashi Yamauchi ,  Takeshi Yamamoto

发明人： Makoto Tanahashi ,  Hisashi Yamauchi ,  Takeshi Yamamoto

IPC分类号： G11B15/675 ,  G11B15/68 ,  G11B23/04

CPC分类号： G11B15/686

摘要： A cassette loading device for a cassette recording apparatus includes a cylindrical cassette magazine having a plurality of radially directed slots, each adapted to contain a tape cassette, and narrow slits along the circumferential periphery thereof for receiving paper slips, each slip having information thereon concerning the recording of a tape cassette in a respective slot; a drive device for intermittently rotating the cassette magazine so that the radially directed slots are successively disposed at a cassette laoding position; a detecting apparatus for detecting the presence of a paper slip in the slit which is retarded by one step with respect to the slit corresponding to the radially directed slot at the cassette loading position and for generating an output signal in response thereto; and a circuit responsive to the output signal for preventing the intermittent rotation of the cassette magazine by the drive device.

摘要翻译： 一种用于盒式磁带记录装置的磁带盒装载装置包括一个圆柱形盒式磁带盒，其具有多个径向定位的槽，每个狭槽适于容纳一个盒式磁带，沿着其圆周周边的窄缝，用于接收纸单， 在相应的槽中记录带盒; 用于间歇地旋转盒式存储器的驱动装置，使得径向定位的槽连续地设置在盒式编码位置; 检测装置，用于检测狭缝中是否存在相对于在所述盒装载位置处的径向指示槽的狭缝相对于一个步长的纸张，并响应于此产生输出信号; 以及响应于输出信号的电路，用于防止驱动装置对盒式存储盒的间歇旋转。

公开(公告)号：US08472823B2

公开(公告)日：2013-06-25

申请号：US12696283

申请日：2010-01-29

申请人： Kazuhiro Okubo ,  Masahiro Yoshida ,  Kazunori Hashimoto ,  Masahiro Shibata ,  Hisashi Yamauchi

发明人： Kazuhiro Okubo ,  Masahiro Yoshida ,  Kazunori Hashimoto ,  Masahiro Shibata ,  Hisashi Yamauchi

IPC分类号： G03G15/08 ,  G03G15/00

CPC分类号： G03G15/08 ,  G03G15/0121 ,  G03G15/0173 ,  G03G15/0194 ,  G03G2215/0145

摘要： An image forming apparatus includes first and second developer carrying members and a control device. The apparatus is operable in a first mode where an image of a single color is formed using the first developer carrying member and is operable in a second mode, wherein an image of a plurality of colors is formed using the first and second developer carrying members. The control device controls a first discharging operation for discharging developer from the first developer carrying member and a second discharging operation for discharging developer from each of the first and second developer carrying members. When the apparatus executes only the first mode, the control device performs more image formations, in a period between completion of the second discharging operation and start of the first discharging operation, compared to a period between completion of the first discharging operation and start of a subsequent first discharging operation.

摘要翻译： 图像形成装置包括第一和第二显影剂承载构件和控制装置。 该装置可以在第一模式中操作，其中使用第一显影剂承载构件形成单一颜色的图像，并且可以在第二模式下操作，其中使用第一和第二显影剂承载构件形成多种颜色的图像。 控制装置控制用于从第一显影剂承载构件排出显影剂的第一排出操作和用于从第一和第二显影剂承载构件中的每一个排出显影剂的第二排出操作。 当装置仅执行第一模式时，控制装置在第二次放电操作完成和第一次放电操作开始之间的时间段内，与第一次放电操作完成和第一次放电操作开始之间的时间段相比，执行更多的图像形成 后续第一次放电操作。

公开(公告)号：US20100196030A1

公开(公告)日：2010-08-05

申请号：US12696283

申请日：2010-01-29

申请人： Kazuhiro Okubo ,  Masahiro Yoshida ,  Kazunori Hashimoto ,  Masahiro Shibata ,  Hisashi Yamauchi

发明人： Kazuhiro Okubo ,  Masahiro Yoshida ,  Kazunori Hashimoto ,  Masahiro Shibata ,  Hisashi Yamauchi

IPC分类号： G03G15/08

CPC分类号： G03G15/08 ,  G03G15/0121 ,  G03G15/0173 ,  G03G15/0194 ,  G03G2215/0145

摘要： An image forming apparatus includes first and second developer carrying members and a control device. The apparatus is operable in a first mode where an image of a single color is formed using the first developer carrying member and is operable in a second mode, wherein an image of a plurality of colors is formed using the first and second developer carrying members. The control device controls a first discharging operation for discharging developer from the first developer carrying member and a second discharging operation for discharging developer from each of the first and second developer carrying members. When the apparatus executes only the first mode, the control device performs more image formations, in a period between completion of the second discharging operation and start of the first discharging operation, compared to a period between completion of the first discharging operation and start of a subsequent first discharging operation.

摘要翻译： 图像形成装置包括第一和第二显影剂承载构件和控制装置。 该装置可以在第一模式中操作，其中使用第一显影剂承载构件形成单一颜色的图像，并且可以在第二模式下操作，其中使用第一和第二显影剂承载构件形成多种颜色的图像。 控制装置控制用于从第一显影剂承载构件排出显影剂的第一排出操作和用于从第一和第二显影剂承载构件中的每一个排出显影剂的第二排出操作。 当装置仅执行第一模式时，控制装置在第二次放电操作完成和第一次放电操作开始之间的时间段内，与第一次放电操作完成和第一次放电操作开始之间的时间段相比，执行更多的图像形成 后续第一次放电操作。

公开(公告)号：US07024606B2

公开(公告)日：2006-04-04

申请号：US10736934

申请日：2003-12-16

申请人： Hisashi Yamauchi

发明人： Hisashi Yamauchi

IPC分类号： G01R31/28

CPC分类号： G01R31/318547 ,  G01R31/318321 ,  G01R31/318342

摘要： A method for preventing the scale of a circuit from being extended and for preventing noise from being generated by a simultaneous value change in output buffers includes: the first process of checking the number of output buffers 15A through 15D whose output values change when boundary scan cells 13E through 13H output input patterns; the second process of checking the noise value generated by the change in the output values when all output values from the output buffers checked in the first process change; the third process of selecting the output buffer from the buffers checked in the first process such that the noise value checked in the second process can be within the noise allowable value; and the fourth process of outputting as a test pattern a pattern obtained by amending the input pattern such that the output value of the output buffer selected in the third process can change.

摘要翻译： 一种用于防止电路规模扩展并防止由输出缓冲器同时变化的噪声产生的方法包括：检查输出缓冲器的数量的第一过程，其输出值在边界时变化 扫描单元13E至13H输出模式; 当在第一过程中检查的所有输出缓冲器的所有输出值改变时，检查由输出值变化产生的噪声值的第二过程; 从在第一处理中检查的缓冲器中选择输出缓冲器的第三过程，使得在第二处理中检查的噪声值可以在噪声允许值内; 以及作为测试图案输出通过修改输入图案而获得的图案的第四过程，使得在第三处理中选择的输出缓冲器的输出值可以改变。

公开(公告)号：US20050262422A1

公开(公告)日：2005-11-24

申请号：US11131229

申请日：2005-05-18

申请人： Hisashi Yamauchi

发明人： Hisashi Yamauchi

IPC分类号： G01R31/28 ,  G11C11/401 ,  G11C29/00 ,  G11C29/12 ,  G11C29/38 ,  G11C29/44 ,  H01L21/822 ,  H01L27/04

CPC分类号： G11C29/44 ,  G11C29/38 ,  G11C2029/0405 ,  G11C2029/1208

摘要： A fault diagnosis method for a semiconductor device in which a memory and a register are monolithically integrated is provided. The fault diagnosis method is composed of: first testing the memory with respect to a series of addresses to identify a first error address; externally outputting the first error address; storing the first error address into the register; second testing the memory with respect to a series of addresses; identifying a second error address different from the first error address using a result of the second testing and the first error address stored in the register; externally outputting the second error address; and updating the register to store the second error address.

摘要翻译： 提供了其中存储器和寄存器是单片集成的半导体器件的故障诊断方法。 故障诊断方法包括：首先对一系列地址进行存储器测试，以识别第一个错误地址; 从外部输出第一错误地址; 将第一个错误地址存储到寄存器中; 相对于一系列地址来测试存储器; 使用第二测试的结果和存储在寄存器中的第一错误地址来识别与第一错误地址不同的第二错误地址; 从外部输出第二错误地址; 并更新寄存器以存储第二个错误地址。