Abstract:
A method for scheduling instructions for clustered digital signal processors comprising a plurality of clusters, each cluster including at least two functional units and a first register file having a first unit, a second unit and a single set of access ports shared by the functional units comprises steps of checking whether executing one instruction needs data to be read from the first unit and the second unit of the first register file, generating a copying instruction to transfer data from the first unit to the second unit of the first register file, checking whether there is a prior operation cycle available to perform the copying instruction, scheduling the copying instruction in the prior operation cycle, and scheduling the instruction after the copying instruction.
Abstract:
A system of remote objects with network streaming ability includes a streaming client, a plurality of streaming servers, a streaming buffer area, a plurality of first continuous buffer areas, a streaming controller, a plurality of first network connections, and a plurality of second network connections. The plurality of streaming servers is used to respond a remote procedure call from the streaming client. The streaming buffer area stores a complete data unit for the streaming client to access. A generation method of remote objects with network streaming ability is further provided. The method includes executing a link procedure, executing a streaming preparation, executing a streaming transfer procedure, and closing the link procedure.
Abstract:
A processor includes a plurality of execution units configured to execute instructions, a pre-decoder configured to sieve out a power-switching instruction from the instructions, and a power controller configured to control the status of the execution unit based on the power-switching instruction. The power controller includes an identification decoder configured to generate identifications respectively corresponding to the execution units from the power-switching instruction, and a power manager configured to switch the execution unit corresponding to the identification. Particularly, the power-switching instruction includes a power-on instruction and a power-off instruction. The processor further includes a plurality of reservation tables each configured to store the instruction to be executed by one of the execution units, and a turn-off signal is not conveyed to the power manager until the reservation table corresponding to the execution unit to be turned off is empty.
Abstract:
A computer-implemented probabilistic pointer analysis method using SSA form comprises the steps of: evaluating a program in an SSA form comprising a target pointer to determine pointer relations between the target pointer, a plurality of aliased pointers related to the target pointer and at least a probable location of the target pointer; and generating a direct probabilistic relation between the target pointer and the at least a probable location of the target pointer according to the pointer relation.
Abstract:
A method of streaming remote procedure invocation for multi-core systems to execute a transmitting thread and an aggregating thread of a multi-core system comprises the steps of: temporarily storing data to be transmitted; activating the aggregating thread if the amount of the temporarily stored data is equal to or greater than a threshold and the aggregating thread is at pause status; pausing the transmitting thread if there is no space to temporarily store the data to be transmitted; retrieving data to be aggregated; activating the transmitting thread if the amount of the data to be aggregated is less than a threshold and the transmitting thread is at pause status; and pausing the aggregating thread if there is no data to be retrieved.
Abstract:
A spilling method in register files for a processor is proposed. The processor is of Parallel Architecture Core (PAC) structure, and accordingly includes a first cluster, a second cluster and a memory. Each of the first and second clusters includes a first function unit (e.g., M-Unit), a second function unit (e.g., I-Unit), a first local register file, a second local register file and a global register file. The first and second local register files are used by the first and second function units, respectively. For a specified live range, the method includes the steps of calculating communication costs of the first local register file, the second local register file and the global register file in each of the first and second clusters, and communication cost of the memory for storing the live range when spilling occurs; calculating use ratios of the first local register file, the second local register file and the global register file in each of the first and second clusters, and use ratio of the memory for the live range; and selecting one of the first local register file, the second local register file and the global register file in each of the first and second clusters and the memory for storing the live range based on the communication costs and the use ratios.
Abstract:
A roaming method for maintaining connectivity between a client and a server through heterogeneous wireless networks includes the steps of establishing an initial connection between the client and the server through a first selected one of the heterogeneous wireless networks, detecting disconnection of the initial connection, and establishing a current connection between the client and server through a second selected one of the heterogeneous wireless networks upon detecting that the initial connection has been disconnected. A system, which includes the client and the server, for realizing the roaming method is also disclosed.
Abstract:
A method for copy propagations of a processor including two clusters, each cluster comprising a first function unit and a second function unit, a first local register file and a second local register file being respectively accessible by the first and second function unit only, and a global register file having a ping-pong structure to access the first and second local register files, the method comprising the steps of: (a) listing possible copy propagation paths between two nodes of a data flow graph; (b) calculating a profit of machine cycles for each of the copy propagation paths according to constraints of the processor; and (c) performing a copy propagation through the copy propagation path if the profit thereof is greater than a threshold value.
Abstract:
A processor includes a plurality of execution units configured to execute instructions, a pre-decoder configured to sieve out a power-switching instruction from the instructions, and a power controller configured to control the status of the execution unit based on the power-switching instruction. The power controller includes an identification decoder configured to generate identifications respectively corresponding to the execution units from the power-switching instruction, and a power manager configured to switch the execution unit corresponding to the identification. Particularly, the power-switching instruction includes a power-on instruction and a power-off instruction. The processor further includes a plurality of reservation tables each configured to store the instruction to be executed by one of the execution units, and a turn-off signal is not conveyed to the power manager until the reservation table corresponding to the execution unit to be turned off is empty.
Abstract:
A system chip includes a plurality of processing elements for performing primary computations of a plurality of tasks, a plurality of non-processing elements for controlling flow of data associated with the tasks among the processing elements, and a main controller including a scheduler, a resource allocation module, and a power management module. The scheduler assigns the tasks on the processing and non-processing elements with reference to time parameters of the processing and non-processing elements. The resource allocation module controls operations of the processing and non-processing elements with reference to task assignments determined by the scheduler. The power management module performs dynamic voltage management upon the processing and non-processing elements according to the scheduled tasks.