公开(公告)号：US5995428A

公开(公告)日：1999-11-30

申请号：US32627

申请日：1998-02-27

Applicant: Pien Chien ,  Shih-Chin Lin ,  Charlie Han

Inventor： Pien Chien ,  Shih-Chin Lin ,  Charlie Han

IPC: G01R31/28 ,  G11C29/50 ,  G11C29/00

CPC classification number: G11C29/50 ,  G01R31/2856 ,  G11C11/401

Abstract: A circuit is provided for use on a wafer formed with a plurality of dice on each of which a memory device, such as a DRAM (dynamic random access memory) device to perform a burn-in operation on the memory device so as to test the reliability thereof. By this circuit, a plurality of pads are formed in the scribe lines that are used as reference marks in the cutting apart of the dice. These pads are used to transfer an externally generated burn-in enable signal and a DC bias voltage to each memory device. Since the pads for burn-in wiring are formed in the scribe lines, they will not take additional space on the dice where each memory device is formed. The burn-in operation is more convenient, quick, and cost-effective to implement.

Abstract translation: 提供了一种电路，用于在形成有多个骰子的晶片上使用，每个骰子具有诸如DRAM（动态随机存取存储器）设备的存储器件，以在存储器件上执行老化操作，以便测试 可靠性。 通过该电路，在切割线中用作参考标记的划线中形成多个焊盘。 这些焊盘用于将外部产生的老化使能信号和直流偏置电压传送到每个存储器件。 由于用于老化线的焊盘形成在划线中，所以它们在形成每个存储器件的骰子上不会占用额外的空间。 老化操作更加方便，快捷，性价比高。