公开(公告)号：US06969878B2

公开(公告)日：2005-11-29

申请号：US10409653

申请日：2003-04-08

Applicant: Philippe Coronel ,  Stephane Monfray ,  Thomas Skotnicki

Inventor： Philippe Coronel ,  Stephane Monfray ,  Thomas Skotnicki

IPC: H01L21/336 ,  H01L29/786 ,  H01L21/84

CPC classification number: H01L29/66772 ,  H01L29/78648 ,  H01L29/78654

Abstract: A semiconductor device is provided that includes a semiconductor channel region extending above a semiconductor substrate in a longitudinal direction between a semiconductor source region and a semiconductor drain region, and a gate region extending in the transverse direction, coating the channel region, and insulated from the channel region. The source, channel, and drain regions are formed in a continuous semiconductor layer that is approximately plane and parallel to the upper surface of the substrate. Additionally, the source, drain, and gate regions are coated in an insulating coating so as to provide electrical insulation between the gate region and the source and drain regions, and between the substrate and the source, drain, gate, and channel regions. Also provided is an integrated circuit that includes such a semiconductor device, and a method for manufacturing such a semiconductor device.

Abstract translation: 提供一种半导体器件，其包括在半导体源极区域和半导体漏极区域之间沿纵向方向在半导体衬底上方延伸的半导体沟道区域和在横向方向上延伸的栅极区域，涂覆沟道区域并与 渠道区域。 源极，沟道和漏极区域形成在大致平面并平行于衬底的上表面的连续半导体层中。 此外，源极，漏极和栅极区域被涂覆在绝缘涂层中，以便在栅极区域和源极和漏极区域之间以及衬底与源极，漏极，栅极和沟道区域之间提供电绝缘。 还提供了一种包括这种半导体器件的集成电路及其制造方法。

公开(公告)号：US20050214993A1

公开(公告)日：2005-09-29

申请号：US11050411

申请日：2005-02-03

Applicant: Thomas Skotnicki ,  Daniel Chanemougame ,  Stephane Monfray

Inventor： Thomas Skotnicki ,  Daniel Chanemougame ,  Stephane Monfray

IPC: H01L21/336 ,  H01L29/786 ,  H01L21/338

CPC classification number: H01L29/66787 ,  H01L29/66772 ,  H01L29/78603

Abstract: A substrate supporting a portion of a semiconductor material is used to produce a field-effect transistor. A portion of a temporary material lies between the portion of semiconductor material and the substrate. A gate is formed, which comprises an upper part in rigid connection with the portion of semiconductor material, and at least one bearing part settled on the substrate. The temporary material is removed and replaced with an electrically insulating material. During removal and replacement of the temporary material, the portion of semiconductor material is held in place relative to the substrate by the gate.

Abstract translation: 使用支撑半导体材料的一部分的衬底来制造场效应晶体管。 临时材料的一部分位于半导体材料的部分和基板之间。 形成栅极，其包括与半导体材料的该部分刚性连接的上部以及沉积在基板上的至少一个承载部分。 将临时材料取出并用电绝缘材料代替。 在移除和更换临时材料期间，半导体材料的部分通过栅极相对于衬底保持就位。

公开(公告)号：US20050037593A1

公开(公告)日：2005-02-17

申请号：US10850040

申请日：2004-05-20

Applicant: Philippe Delpech ,  Christophe Regnier ,  Sebastien Cremer ,  Stephane Monfray

Inventor： Philippe Delpech ,  Christophe Regnier ,  Sebastien Cremer ,  Stephane Monfray

IPC: H01L21/02 ,  H01L21/336 ,  H01L21/762 ,  H01L29/786 ,  H01L21/76

CPC classification number: H01L28/40 ,  H01L21/76264 ,  H01L29/66772 ,  H01L29/78648

Abstract: A process for producing an integrated electronic circuit comprises the production of a first electronic component and a second electronic component that are superposed on top of a substrate. A volume of temporary material is formed on the substrate at the position of the second electronic component. The first electronic component is then produced above the volume of temporary material relative to the substrate, and then the second electronic component is produced using at least one shaft for access to the temporary material. The first electronic component may be an active component and the second electronic component may be a passive component.

Abstract translation: 一种用于制造集成电子电路的方法包括制造叠置在基板顶部上的第一电子部件和第二电子部件。 在第二电子部件的位置处，在基板上形成一定量的临时材料。 然后在临时材料的体积上方相对于基板制造第一电子部件，然后使用至少一个轴来制造第二电子部件，用于接近临时材料。 第一电子部件可以是有源部件，第二电子部件可以是无源部件。