CARD EDGE CONNECTOR WITH IMPROVED RETAINER
    21.
    发明申请
    CARD EDGE CONNECTOR WITH IMPROVED RETAINER 有权
    具有改进保持器的卡片边缘连接器

    公开(公告)号:US20110117768A1

    公开(公告)日:2011-05-19

    申请号:US12949788

    申请日:2010-11-19

    CPC classification number: H01R12/7029 H01R12/721

    Abstract: A card edge connector for mating with an electronic card includes an elongated housing, a number of contacts and a retainer disposed in the housing. The housing has a center slot extending along a lengthwise direction of the housing and a first tower section at one end thereof. The retainer is rotatably retained in the first tower section and does not extend beyond the first tower along the lengthwise direction, a thickness direction of the housing and a direction opposite to an insertion direction of the electronic card. The retainer has a locker to lock the electronic card and at least a spring sandwiched between the locker and an outer wall of the first tower section to make the locker automatically move in the lengthwise direction in an insertion process of the electronic card.

    Abstract translation: 用于与电子卡匹配的卡缘连接器包括细长壳体,多个触点和设置在壳体中的保持器。 壳体具有沿着壳体的长度方向延伸的中心狭槽和在其一端的第一塔架部分。 保持器可旋转地保持在第一塔架部分中,并且不沿着长度方向延伸超过第一塔架,壳体的厚度方向和与电子卡片的插入方向相反的方向。 保持器具有锁定器,用于锁定电子卡片和至少夹在储物柜和第一塔架部分的外壁之间的弹簧,以在电子卡片的插入过程中使储物柜沿长度方向自动移动。

    ELECTRICAL CONNECTOR WITH AN IMPROVED BOARD LOCK
    22.
    发明申请
    ELECTRICAL CONNECTOR WITH AN IMPROVED BOARD LOCK 有权
    具有改进板锁的电连接器

    公开(公告)号:US20110104926A1

    公开(公告)日:2011-05-05

    申请号:US12912783

    申请日:2010-10-27

    CPC classification number: H01R12/737 H01R12/7029 H01R12/721

    Abstract: An electrical connector includes an insulative housing having a mating face, a mounting face, a pair of side walls, a elongated central slot recessed downwardly from the mating face, a first end wall and a second end wall, the central slot being positioned between the side walls, the first end wall and the second end wall, the side walls include a plurality of passageways communicating with the central slot; a plurality of contacts being retained in the passageways respectively and protruding into the central slot; a metal board lock extending downwardly through the first end wall and being attached to the first end wall; a retainer attached to the first end wall to mating with a corresponding card; the board lock is sandwiched between the retainer and the first end wall.

    Abstract translation: 电连接器包括具有配合面的绝缘壳体,安装面,一对侧壁,从配合面向下凹陷的细长中心狭槽,第一端壁和第二端壁,中心狭槽位于 侧壁,第一端壁和第二端壁,侧壁包括与中心狭槽连通的多个通道; 多个触头分别保持在通道中并突出到中心狭槽中; 金属板锁,其向下延伸穿过第一端壁并且附接到第一端壁; 附接到第一端壁以与相应的卡匹配的保持器; 板锁被夹在保持器和第一端壁之间。

    CARD EDGE CONNECTOR WITH IMPROVED COVER
    25.
    发明申请
    CARD EDGE CONNECTOR WITH IMPROVED COVER 有权
    带改进盖的卡边连接器

    公开(公告)号:US20110086552A1

    公开(公告)日:2011-04-14

    申请号:US12903232

    申请日:2010-10-13

    CPC classification number: H01R13/506 H01R12/721

    Abstract: A card edge connector comprises an insulative housing defining a front mating face and a central slot recessed rearwardly from the mating face. A plurality of contacts each has a contact portion exposed into the central for mating with a complementary connector and a solder tail exposed to outside of the housing. A cover is assembled to a rear side of the housing. A spacer sandwiched between the housing and the cover along a front-to-rear direction. The spacer defines a plurality of through holes through which the solder tails of the contacts passing.

    Abstract translation: 卡缘连接器包括限定前配合面的绝缘壳体和从配合面向后凹陷的中心狭槽。 多个触点各自具有暴露于中心的接触部分,用于与互补连接器配合,以及暴露于壳体外部的焊接尾部。 盖子组装到壳体的后侧。 沿着前后方向夹在壳体和盖之间的间隔件。 间隔件限定了多个通孔,触点的焊尾通过该通孔。

    Thin Film Transistor Array Panel and Method for Manufacturing the Same
    26.
    发明申请
    Thin Film Transistor Array Panel and Method for Manufacturing the Same 有权
    薄膜晶体管阵列面板及其制造方法

    公开(公告)号:US20110068340A1

    公开(公告)日:2011-03-24

    申请号:US12652379

    申请日:2010-01-05

    CPC classification number: H01L27/124 H01L29/78618

    Abstract: A thin film transistor array panel includes an insulating substrate. A gate line is formed on the insulating substrate and has a gate electrode. A gate insulating layer is formed on the gate line. A semiconductor layer is formed on the gate insulating layer and overlaps the gate electrode. Diffusion barriers are formed on the semiconductor layer and contain nitrogen. A data line crosses the gate line and has a source electrode partially contacting the diffusion barriers and a drain electrode partially contacting the diffusion barriers and facing the source electrode. The drain electrode is on the gate electrode. A pixel electrode is electrically connected to the drain electrode.

    Abstract translation: 薄膜晶体管阵列面板包括绝缘基板。 在绝缘基板上形成栅极线,并具有栅电极。 在栅极线上形成栅极绝缘层。 半导体层形成在栅极绝缘层上并与栅电极重叠。 在半导体层上形成扩散阻挡层并含有氮。 数据线与栅极线交叉,并且具有部分地接触扩散阻挡层的源电极和部分地接触扩散阻挡层并面向源电极的漏电极。 漏电极在栅电极上。 像素电极电连接到漏电极。

    Reformatting binary image data to generate smaller compressed image data size
    27.
    发明授权
    Reformatting binary image data to generate smaller compressed image data size 有权
    重新格式化二进制图像数据以生成较小的压缩图像数据大小

    公开(公告)号:US07894683B2

    公开(公告)日:2011-02-22

    申请号:US12606523

    申请日:2009-10-27

    CPC classification number: H04N1/41 G06K9/00456

    Abstract: In various exemplary embodiments, systems include a segmentor to segment text binary image data to a first plane. A subtractor subtracts text binary image from binary image data to generate a non-text binary image data in a second plane. A converter converts non-text binary image data in the second plane into non-text gray scale image data in the second plane. A first compressor compresses the text gray scale image data in the first plane. A second compressor compresses the non-text gray scale image in the second plane.

    Abstract translation: 在各种示例性实施例中,系统包括用于将文本二进制图像数据分割到第一平面的分段器。 减法器从二进制图像数据中减去文本二进制图像,以在第二平面中生成非文本二进制图像数据。 A转换器将第二平面中的非文本二进制图像数据转换成第二平面中的非文本灰度图像数据。 第一压缩器压缩第一平面中的文本灰度图像数据。 第二压缩机压缩第二平面中的非文本灰度图像。

    CARD EDGE CONNECTOR WITH AN IMPROVED RETAINER
    28.
    发明申请
    CARD EDGE CONNECTOR WITH AN IMPROVED RETAINER 有权
    具有改进保持器的卡片边缘连接器

    公开(公告)号:US20110021053A1

    公开(公告)日:2011-01-27

    申请号:US12842051

    申请日:2010-07-23

    CPC classification number: H01R13/639 H01R12/721 H05K7/1404

    Abstract: A card edge connector for mating with an electronic card includes an elongated housing (1), a number of contacts retained to the housing (1), and a retainer (2) at one end of the housing (1). The housing (1) has a pair of opposed side walls (11), a central slot (12) between the side walls and a fitting section at one end thereof. The fitting section defines a pair of axes holes (145). The retainer (2) has a base portion (21) with a pair of pivots (211) engaging with the axes holes (145), a latch projection (22) inwardly extending from the base portion for locking the electronic card, a flexible arm (23) unitarily extending from the base portion (21) to resist an inner wall of the fitting section for fastening the retainer (2) to the housing (1).

    Abstract translation: 用于与电子卡匹配的卡边缘连接器包括细长壳体(1),保持在壳体(1)上的多个触点以及在壳体(1)的一端的保持器(2)。 壳体(1)具有一对相对的侧壁(11),在侧壁之间的中心狭槽(12)和在其一端的配合部分。 装配部分限定一对轴孔(145)。 所述保持器(2)具有基部(21),其具有与所述轴孔(145)接合的一对枢轴(211),从所述基部向内延伸以锁定所述电子卡的闩锁突起(22) (23)从所述基部(21)整体延伸以抵抗所述装配部分的内壁,用于将所述保持器(2)紧固到所述壳体(1)。

    Background suppression in a multi-function color scanning system
    29.
    发明授权
    Background suppression in a multi-function color scanning system 有权
    背景抑制在多功能彩色扫描系统中

    公开(公告)号:US07843616B2

    公开(公告)日:2010-11-30

    申请号:US12056395

    申请日:2008-03-27

    Applicant: Xing Li

    Inventor: Xing Li

    CPC classification number: H04N1/4072 H04N1/6005 H04N1/6094

    Abstract: What is disclosed is a novel system and method for background suppression in the image path. In one example embodiment, an image is scanned and RGB color values generated for each pixel. Each of the pixels is converted into a Lab color space to obtain luminance and chrominance values. A background luminance and a luminance variation are determined for the scanned image. For each pixel, a determination is made whether that pixel is a white pixel or a non-white pixel based. If the pixel is a white pixel, an adjustment chrominance value for that pixel is determined. The value of the chrominance adjustment is modulated as a function of a difference between the white pixel's luminance and the background luminance. The modulated chrominance adjustment is applied to the white pixel. Adjusted and non-adjusted pixels are stored in a memory. A printer controller converts the pixels to an output space.

    Abstract translation: 公开的是用于图像路径中的背景抑制的新型系统和方法。 在一个示例实施例中,扫描图像并为每个像素生成RGB颜色值。 每个像素被转换成Lab颜色空间以获得亮度和色度值。 确定扫描图像的背景亮度和亮度变化。 对于每个像素,确定该像素是基于白色像素还是非白色像素。 如果像素是白色像素,则确定该像素的调整色度值。 色度调整的值被调制为白色像素的亮度和背景亮度之间的差的函数。 调制色度调整被应用于白色像素。 调整和未调整的像素存储在存储器中。 打印机控制器将像素转换为输出空间。

    FUSE CIRCUITS
    30.
    发明申请
    FUSE CIRCUITS 有权
    保险丝电路

    公开(公告)号:US20100283531A1

    公开(公告)日:2010-11-11

    申请号:US12463071

    申请日:2009-05-08

    CPC classification number: G11C17/18

    Abstract: A fuse circuit includes a fuse having an intact state and a blown state. The fuse can be switched to the blown state by enabling a blowing current to flow through the fuse. The fuse is coupled between a first transistor and a second transistor in series. The first transistor and the second transistor are complementary transistors and operable for reducing an electrostatic discharge current flowing through the fuse. The first transistor and the second transistor are turned on to enable the blowing current to flow through the fuse.

    Abstract translation: 保险丝电路包括具有完整状态和吹制状态的保险丝。 熔断器可以通过使熔丝流过熔断器而切换到熔断状态。 熔丝串联连接在第一晶体管和第二晶体管之间。 第一晶体管和第二晶体管是互补晶体管并且可操作用于减少流过保险丝的静电放电电流。 第一晶体管和第二晶体管导通,使得吹风电流能够流过保险丝。

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