公开(公告)号：US20070009838A1

公开(公告)日：2007-01-11

申请号：US11475913

申请日：2006-06-28

Applicant: Ji-Yong You ,  Chun-Suk Suh ,  Hak Kim ,  Dae-Joung Kim ,  Kyoung-Yun Baek

Inventor： Ji-Yong You ,  Chun-Suk Suh ,  Hak Kim ,  Dae-Joung Kim ,  Kyoung-Yun Baek

IPC: G03F7/26

CPC classification number: G03F7/405 ,  H01L21/0334 ,  H01L21/3083

Abstract: A method of manufacturing a pattern structure and a method of forming a trench using the same are provided. A mask pattern structure having mask patterns spaced apart from one another may be formed on a layer. The mask pattern structure may be divided into a first region having a first pattern density and a second region having a second pattern density higher than the first pattern density. The layer may be etched using the mask pattern structure as an etching mask to form first sidewalls positioned under the first region and second sidewalls positioned under the second region. The first sidewall may have a first profile that may be substantially vertical. The second sidewall may have a second profile of which an interval between the second sidewalls becomes narrower toward lower portions of the second sidewalls.

Abstract translation: 提供了制造图案结构的方法和使用其形成沟槽的方法。 具有彼此间隔开的掩模图案的掩模图案结构可以形成在层上。 掩模图案结构可以被划分为具有第一图案密度的第一区域和具有高于第一图案密度的第二图案密度的第二区域。 可以使用掩模图案结构蚀刻该层作为蚀刻掩模，以形成位于第一区域下方的第一侧壁和位于第二区域下方的第二侧壁。 第一侧壁可以具有基本垂直的第一轮廓。 第二侧壁可以具有第二轮廓，第二侧壁之间的间隔朝向第二侧壁的下部变窄。

公开(公告)号：US20070007600A1

公开(公告)日：2007-01-11

申请号：US11482795

申请日：2006-07-10

Applicant: Kyoung-Yun Baek ,  Yong-Sun Ko ,  Chun-Suk Suh

Inventor： Kyoung-Yun Baek ,  Yong-Sun Ko ,  Chun-Suk Suh

IPC: H01L29/94

CPC classification number: H01L29/1037 ,  H01L27/10873 ,  H01L29/42376

Abstract: Example embodiments of the present invention relate to a metal oxide semiconductor (MOS) transistor and a method of manufacturing the MOS transistor. A MOS transistor may include a substrate, a semiconductor pattern, a gate insulation layer and/or source-drain regions. The substrate may include an active region and/or a field region. The semiconductor pattern may extend from the active region and may extend along the active region in a first direction. The gate insulation layer may be formed on the substrate to cover the semiconductor pattern. The gate electrode may be formed on the semiconductor pattern. The gate electrode may have a linear shape extending in the first direction. The source-drain regions may be formed at portions of the active region adjacent to the gate electrode in a second direction substantially perpendicular to the first direction. A channel of the transistor may be formed along a sidewall and an upper surface of the semiconductor pattern in order that the channel may have a length substantially larger than a width of the gate electrode, increasing electrical characteristics of the MOS transistor.

Abstract translation: 本发明的实施例涉及一种金属氧化物半导体（MOS）晶体管及其制造方法。 MOS晶体管可以包括衬底，半导体图案，栅极绝缘层和/或源极 - 漏极区域。 衬底可以包括有源区和/或场区。 半导体图案可以从有源区域延伸并且可沿第一方向沿着有源区域延伸。 栅极绝缘层可以形成在衬底上以覆盖半导体图案。 栅电极可以形成在半导体图案上。 栅电极可以具有在第一方向上延伸的线性形状。 源极 - 漏极区域可以形成在与栅电极相邻的有源区域的基本上垂直于第一方向的第二方向上的部分处。 可以沿着半导体图案的侧壁和上表面形成晶体管的沟道，以便沟道可以具有基本上大于栅电极的宽度的长度，从而增加MOS晶体管的电特性。

公开(公告)号：US07012031B2

公开(公告)日：2006-03-14

申请号：US11026100

申请日：2005-01-03

Applicant: Yeon-Dong Choi ,  Kyoung-Yun Baek

Inventor： Yeon-Dong Choi ,  Kyoung-Yun Baek

IPC: H01L21/027

CPC classification number: H01L22/34 ,  G03F1/44 ,  G03F7/70625 ,  G03F7/7065 ,  Y10S438/942

Abstract: A photoresist pattern and a method of fabricating the same make it easy to quickly identify a particular portion of a photolithography process that is responsible for causing process defects. The method of fabricating the photoresist pattern includes forming main patterns having a predetermined critical dimension in device-forming regions of a semiconductor substrate, and forming a plurality of test patterns in scribe regions of the substrate. The scribe regions are defined alongside the device-forming regions and separate the device-forming regions from one another. The test patterns have shapes similar to that of the main patterns. Also, one of the test patterns has a critical dimensions similar to that of the main patterns, and other test patterns have respective critical dimensions that are different from the critical dimension of the main patterns.

公开(公告)号：US20050153466A1

公开(公告)日：2005-07-14

申请号：US11026100

申请日：2005-01-03

Applicant: Yeon-Dong Choi ,  Kyoung-Yun Baek

Inventor： Yeon-Dong Choi ,  Kyoung-Yun Baek

IPC: H01L21/027 ,  G03F1/14 ,  G03F7/20 ,  H01L21/66 ,  H01L23/544

CPC classification number: H01L22/34 ,  G03F1/44 ,  G03F7/70625 ,  G03F7/7065 ,  Y10S438/942

Abstract: A photoresist pattern and a method of fabricating the same make it easy to quickly identify a particular portion of a photolithography process that is responsible for causing process defects. The method of fabricating the photoresist pattern includes forming main patterns having a predetermined critical dimension in device-forming regions of a semiconductor substrate, and forming a plurality of test patterns in scribe regions of the substrate. The scribe regions are defined alongside the device-forming regions and separate the device-forming regions from one another. The test patterns have shapes similar to that of the main patterns. Also, one of the test patterns has a critical dimensions similar to that of the main patterns, and other test patterns have respective critical dimensions that are different from the critical dimension of the main patterns.

Abstract translation: 光致抗蚀剂图案及其制造方法使得易于识别导致工艺缺陷的光刻工艺的特定部分变得容易。 制造光致抗蚀剂图案的方法包括在半导体衬底的器件形成区域中形成具有预定临界尺寸的主图案，并在衬底的划线区域中形成多个测试图案。 划线区域沿着器件形成区域定义并且将器件形成区域彼此分离。 测试图案具有与主图案类似的形状。 此外，其中一个测试图案具有与主图案相似的关键尺寸，其他测试图案具有与主图案的临界尺寸不同的各自的关键尺寸。