SERVING MEMORY REQUESTS IN CACHE COHERENT HETEROGENEOUS SYSTEMS
    21.
    发明申请
    SERVING MEMORY REQUESTS IN CACHE COHERENT HETEROGENEOUS SYSTEMS 审中-公开
    在高速缓存异构系统中服务存储器请求

    公开(公告)号:US20140281234A1

    公开(公告)日:2014-09-18

    申请号:US13795777

    申请日:2013-03-12

    CPC classification number: G06F12/0815 G06F12/0817

    Abstract: Apparatus, computer readable medium, and method of servicing memory requests are presented. A read request for a memory block from a requester processing having a processor type may be serviced by providing exclusive access to the requested memory block to the requester processor when the requested memory block was modified a last time it was accessed by a previous requester processor having a same processor type as the processor type of the requester processor. Exclusive access to the requested memory block may be provided to the requester processor based on whether the requested memory block was modified by a previous processor having a same type as the requester processor at least once in the last several times the memory block was in a cache of the previous processor. Exclusive access to the requested memory block may be provided to the requester processor based on a region of the memory block.

    Abstract translation: 提供了设备,计算机可读介质和服务存储器请求的方法。 当具有处理器类型的请求者处理的存储器块的读取请求可以通过向所请求的处理器提供对所请求的存储器块的独占访问来服务,当所请求的存储器块在上一次由先前的请求者处理器访问时被修改时 与请求者处理器的处理器类型相同的处理器类型。 可以基于所请求的存储器块是否由与请求器处理器具有相同类型的先前处理器在存储器块处于高速缓存器的最后几次中至少一次进行修改而提供给所请求的存储器块的独占访问 的以前的处理器。 可以基于存储器块的区域向请求者处理器提供对所请求的存储器块的独占访问。

    Conditional Notification Mechanism
    22.
    发明申请
    Conditional Notification Mechanism 有权
    条件通知机制

    公开(公告)号:US20140250312A1

    公开(公告)日:2014-09-04

    申请号:US13782117

    申请日:2013-03-01

    Abstract: The described embodiments comprise a first hardware context. The first hardware context receives, from a second hardware context, an indication of a memory location and a condition to be met by the memory location. The first hardware context then sends a signal to the second hardware context when the memory location meets the condition.

    Abstract translation: 所描述的实施例包括第一硬件上下文。 第一硬件上下文从第二硬件上下文接收存储器位置的指示和存储器位置要满足的条件。 当存储器位置满足条件时,第一硬件上下文然后向第二硬件上下文发送信号。

    Redundant Threading for Improved Reliability
    23.
    发明申请
    Redundant Threading for Improved Reliability 审中-公开
    冗余线程提高可靠性

    公开(公告)号:US20140156975A1

    公开(公告)日:2014-06-05

    申请号:US13690841

    申请日:2012-11-30

    Abstract: In some embodiments, a method for improving reliability in a processor is provided. The method can include replicating input data for first and second lanes of a processor, the first and second lanes being located in a same cluster of the processor and the first and second lanes each generating a respective value associated with an instruction to be executed in the respective lane, and responsive to a determination that the generated values do not match, providing an indication that the generated values do not match.

    Abstract translation: 在一些实施例中,提供了一种用于提高处理器中的可靠性的方法。 该方法可以包括为处理器的第一和第二通道复制输入数据,第一和第二通道位于处理器的相同簇中,并且第一和第二通道各自产生与将要执行的指令相关联的相应值 并且响应于确定所生成的值不匹配,提供所生成的值不匹配的指示。

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