公开(公告)号：US10381161B2

公开(公告)日：2019-08-13

申请号：US15804463

申请日：2017-11-06

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chi-Chang Lee ,  Wen-Long Lu

IPC: H01G4/30 ,  H01G4/228 ,  H01G4/06 ,  H01G4/012 ,  H01G4/008 ,  H01G4/10

Abstract: A capacitor structure includes a first conductive layer, a first insulation layer, a first dielectric layer and a second conductive layer. The first conductive layer includes a first conductive material. The first insulation layer is disposed adjacent to the first conductive layer in a same plane as the first conductive layer. The first dielectric layer is on the first conductive layer and the first insulation layer. The second conductive layer is on the first dielectric layer and includes a second conductive material. The first conductive material is different from the second conductive material.

公开(公告)号：US10103107B1

公开(公告)日：2018-10-16

申请号：US15671821

申请日：2017-08-08

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen-Long Lu

IPC: H01L23/552 ,  H01L23/00 ,  H01L23/31 ,  H01L21/56 ,  H01L21/02 ,  H01L23/522 ,  H01L21/768 ,  H01L23/532

Abstract: A semiconductor device includes at least one base element, at least one passivation layer, at least one circuit layer and at least one light absorbing layer. The base element includes at least one conductive pad. The passivation layer is disposed on the base element. The circuit layer is electrically connected to the conductive pad and disposed in the passivation layer. The light absorbing layer is disposed on the circuit layer.

公开(公告)号：US11538760B2

公开(公告)日：2022-12-27

申请号：US17125848

申请日：2020-12-17

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen-Long Lu

IPC: H01L23/538 ,  H01L21/48 ,  H01L23/498 ,  H01L25/065

Abstract: A semiconductor package structure and a method for manufacturing a semiconductor package structure are provided. The semiconductor package structure includes a lower conductive structure, a first semiconductor device and a second semiconductor device. The upper conductive structure is disposed on the lower conductive structure. The second semiconductor device is electrically connected to the first semiconductor device by a first path in the upper conductive structure. The lower conductive structure is electrically connected to the first semiconductor device through a second path in the upper conductive structure under the first path.

公开(公告)号：US11532542B2

公开(公告)日：2022-12-20

申请号：US17006688

申请日：2020-08-28

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen-Long Lu

IPC: H01L23/498 ,  H01L23/00 ,  H01L21/48 ,  H01L23/48

Abstract: A wiring structure and a method for manufacturing the same are provided. The wiring structure includes a conductive structure and a plurality of conductive through vias. The conductive structure includes a dielectric layer, a circuit layer in contact with the dielectric layer, a plurality of dam portions and an outer metal layer. The dam portions extend through the dielectric layer. The dam portion defines a through hole. The outer metal layer is disposed adjacent to a top surface of the dielectric layer and extends into the through hole of the dam portion. The conductive through vias are disposed in the through holes of the dam portions and electrically connecting the circuit layer.

公开(公告)号：US11495557B2

公开(公告)日：2022-11-08

申请号：US16825713

申请日：2020-03-20

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Jhao-Cheng Chen ,  Huang-Hsien Chang ,  Wen-Long Lu ,  Shao Hsuan Chuang ,  Ching-Ju Chen ,  Tse-Chuan Chou

IPC: H01L23/00

Abstract: A semiconductor device and method for manufacturing the same are provided. The method includes providing a first substrate. The method also includes forming a first metal layer on the first substrate. The first metal layer includes a first metal material. The method further includes treating a first surface of the first metal layer with a solution including an ion of a second metal material. In addition, the method includes forming a plurality of metal particles including the second metal material on a portion of the first surface of the first metal layer.

公开(公告)号：US11302644B2

公开(公告)日：2022-04-12

申请号：US16732166

申请日：2019-12-31

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen-Long Lu

IPC: H01L23/538 ,  H01L21/56 ,  H01L25/00 ,  H01L23/00

Abstract: A package structure includes a substrate, a first electronic component, a second electronic component, a third electronic component and a connection component. The substrate includes a first surface and a second surface opposite the first surface. The first electronic component is disposed at the substrate and has a first active surface exposed from the second surface of the substrate. The second electronic component includes a second active surface facing the first active surface of the first electronic component. The second active surface of the second electronic component is electrically connected to the first active surface of the first electronic component. The third electronic component includes a third active surface facing the first active face of the first electronic component. The connection component electrically connects the third active surface of the third electronic component to the first active surface of the first electronic component. The connection component has at least two bendings.

公开(公告)号：US11222870B2

公开(公告)日：2022-01-11

申请号：US16796921

申请日：2020-02-20

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen-Long Lu ,  Min Lung Huang

IPC: H01L21/48 ,  H01L25/065 ,  H01L23/538 ,  H01L25/00 ,  H01L23/31

Abstract: A semiconductor device package includes a first substrate and a second substrate arranged above the first substrate. A first connector is disposed on the first substrate, and a first conductor passes through the second substrate and connects to the first connector.

公开(公告)号：US11101541B2

公开(公告)日：2021-08-24

申请号：US16592550

申请日：2019-10-03

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen-Long Lu

IPC: H01L21/00 ,  H01Q1/22 ,  H01L23/52 ,  H01L23/28 ,  H01L23/66

Abstract: A semiconductor assembly includes a first wiring structure, a first semiconductor die and a first electronic element. The first wiring structure has a first surface. The first semiconductor die is disposed on the first surface of the first wiring structure. The first electronic element is electrically connected to the first wiring structure. The first electronic element includes a first metal layer, a second metal layer and a dielectric material interposed between the first metal layer and the second metal layer. The first metal layer and the second metal layer are substantially perpendicular to the first surface of the first wiring structure.

公开(公告)号：US11062994B2

公开(公告)日：2021-07-13

申请号：US16512140

申请日：2019-07-15

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen-Long Lu

IPC: H01L23/532 ,  H01L23/485 ,  H01L23/482 ,  H01L21/768

Abstract: A semiconductor device package includes a substrate and an electronic component disposed on the substrate. The electronic component has an active surface facing away from the substrate. The substrate has a first conductive pad and a second conductive pad disposed thereon. The electronic component has a first electrical contact and a second electrical contact disposed on the active surface. The semiconductor device package further includes a first metal layer connecting the first electrical contact with the first conductive pad, a second metal layer connecting the second electrical contact with the second conductive pad, a first seed layer disposed below the first metal layer; and a first isolation layer disposed between the first metal layer and the second metal layer. A method of manufacturing a semiconductor device package is also disclosed.

公开(公告)号：US10714403B2

公开(公告)日：2020-07-14

申请号：US15803387

申请日：2017-11-03

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen-Long Lu

IPC: H01L23/31 ,  H01L21/56 ,  H01L23/498 ,  H01L21/48 ,  H01L23/538 ,  H01L23/522 ,  H01L23/00 ,  H01L25/18 ,  H01L25/065 ,  H01L25/00

Abstract: At least some embodiments of the present disclosure relate to a semiconductor device package. The semiconductor device package comprises a carrier, a first patterned conductive layer, an interconnection structure, a first semiconductor device, an encapsulant, a second patterned conductive layer, and a passivation layer. The carrier has a first surface and a second surface opposite to the first surface. The first patterned conductive layer is adjacent to the first surface of the carrier. The interconnection structure is disposed on the first patterned conductive layer and electrically connected to the first patterned conductive layer. The first semiconductor device is disposed on the interconnection structure and electrically connected to the interconnection structure. The encapsulant is disposed on the first patterned conductive layer and encapsulates the semiconductor device and the interconnection structure. The second patterned conductive layer is disposed on a top surface and a side surface of the encapsulant and electrically connected to the first patterned conductive layer. The passivation layer is disposed on the second patterned conductive layer and covers the side surface of the encapsulant.