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162 条记录 (耗时 0.026 秒)

    Handover for DVB-H
    21.
    发明申请
    Handover for DVB-H 有权
    DVB-H的切换

    公开(公告)号：US20080273497A1

    公开(公告)日：2008-11-06

    申请号：US11800703

    申请日：2007-05-04

    申请人： Xiaolin Lu ,  Rao Venkatasadasiva ,  Zigang Yang ,  Anand G. Dabak ,  Srinath Hosur ,  Badri Varadarajan ,  Susan Yim

    发明人： Xiaolin Lu ,  Rao Venkatasadasiva ,  Zigang Yang ,  Anand G. Dabak ,  Srinath Hosur ,  Badri Varadarajan ,  Susan Yim

    IPC分类号： H04Q7/00

    CPC分类号： H04H20/26 ,  H04H20/67 ,  H04W36/08 ,  H04W36/30 ,  H04W36/36

    摘要： A method of wireless handover in a broadcast network (FIGS. 5 and 8) is disclosed. A wireless receiver (FIG. 4) receives a first signal (N) from a first transmitter (f1). The receiver measures a signal strength (RSSI) of the first signal. The strength of the first signal is compared to a first threshold (T0). The receiver receives a second signal (N+3) from a second transmitter (f3) in response to the step of comparing. The first and the second signals are sent to an application processor (120). The wireless receiver continues to receive the first and second signals until the application processor terminates receiving one of the first and second signals.

    摘要翻译： 公开了广播网络中的无线切换的方法（图5和图8）。 无线接收器（图4）从第一发射机（f 1> 1）接收第一信号（N）。 接收机测量第一信号的信号强度（RSSI）。 将第一信号的强度与第一阈值（T 0> 0）进行比较。 响应于比较步骤，接收机从第二发射机（f 3> 3）接收第二信号（N + 3）。 第一和第二信号被发送到应用处理器（120）。 无线接收机继续接收第一和第二信号，直到应用处理器终止接收第一和第二信号之一。

    Maximum likelihood timing synchronizers for sampled PSK burst TDMA system
    22.
    发明授权
    Maximum likelihood timing synchronizers for sampled PSK burst TDMA system 有权
    采样PSK突发TDMA系统的最大似然定时同步器

    公开(公告)号：US07003016B1

    公开(公告)日：2006-02-21

    申请号：US09417233

    申请日：1999-10-13

    申请人： Srinath Hosur ,  Anand G. Dabak

    发明人： Srinath Hosur ,  Anand G. Dabak

    IPC分类号： H04L27/30

    CPC分类号： H04L27/2332 ,  H04L7/042

    摘要： A method of producing a correction signal includes receiving a predetermined data sequence (500). The data sequence is sampled at predetermined times, thereby producing a sampled data sequence (522, 532). The sampled data sequence is separated into first and second sampled data sequences. A ratio is calculated (550, 558) from the first and second sampled data sequences. A correction signal is produced (556, 564) in response to the ratio.

    摘要翻译： 产生校正信号的方法包括接收预定的数据序列（500）。 在预定时间采样数据序列，从而产生采样数据序列（522,532）。 采样数据序列被分成第一和第二采样数据序列。 从第一和第二采样数据序列计算一个比率（550,558）。 根据该比率产生校正信号（556,544）。

    Acquisition of an unevenly spaced synchronization channel in a wireless communication system
    23.
    发明授权
    Acquisition of an unevenly spaced synchronization channel in a wireless communication system 有权
    在无线通信系统中获取不均匀间隔的同步信道

    公开(公告)号：US06834046B1

    公开(公告)日：2004-12-21

    申请号：US09679657

    申请日：2000-10-04

    申请人： Srinath Hosur ,  Sundararajan Sriram ,  Timothy M. Schmidl ,  Anand G. Dabak

    发明人： Srinath Hosur ,  Sundararajan Sriram ,  Timothy M. Schmidl ,  Anand G. Dabak

    IPC分类号： H04B7216

    CPC分类号： H04B1/7083

    摘要： A method (70) of operating a wireless receiver (UST). The method receives a wireless communicated signal, wherein the signal comprises asymmetrically spaced synchronization channel components. The method also defines (72) a set of signals from the communicated signal, wherein the set spans a number of equal duration time slots and comprises at least a first synchronization channel component and a second synchronization channel component. The method also forms (76) a first signal combination by combining a first portion of the set of signals with a second portion of the set of signals, and it forms (78) a second signal combination by combining a third portion of the set of signals with a fourth portion of the set of signals. Finally, the method detects (80, 82, 84) a location of the first synchronization channel component and a location of the second synchronization channel component in response to at least one of the first and second signal combinations.

    摘要翻译： 一种操作无线接收机（UST）的方法（70）。 该方法接收无线通信信号，其中该信号包括不对称间隔的同步信道分量。 该方法还定义（72）来自所传送的信号的一组信号，其中该组跨越多个相等的持续时间时隙，并且包括至少第一同步信道分量和第二同步信道分量。 该方法还通过将该组信号的第一部分与该组信号的第二部分组合来形成（76）第一信号组合，并且它通过组合第二信号组合的第三部分来形成（78）第二信号组合 信号与该组信号的第四部分。 最后，响应于第一和第二信号组合中的至少一个，该方法检测（80,82,84）第一同步信道分量的位置和第二同步信道分量的位置。

    Use of Walsh-Hadamard transform for forward link multiuser detection in CDMA systems
    24.
    发明授权
    Use of Walsh-Hadamard transform for forward link multiuser detection in CDMA systems 有权
    在CDMA系统中使用沃尔什 - 哈达玛变换进行前向链路多用户检测

    公开(公告)号：US06798737B1

    公开(公告)日：2004-09-28

    申请号：US09413314

    申请日：1999-10-06

    申请人： Anand G. Dabak ,  Srinath Hosur ,  Timothy M. Schmidl

    发明人： Anand G. Dabak ,  Srinath Hosur ,  Timothy M. Schmidl

    IPC分类号： H04J1100

    CPC分类号： H04B1/71075 ,  H04B1/7115

    摘要： A station capable of receiving information containing Walsh coding for a plurality of channels and canceling interference from the received information and the method of cancellation. A memory is provided for storing received signals containing a Walsh code for each of a plurality of channels as well as reflected and/or refracted versions of said received signals and a first plurality of signal paths is provided which are selectively coupled to the memory. The signal paths apply corresponding delays and inverse Walsh code transformations to separate the channels. Further, cancellation of the channels interfering with a desired channel proceeds with complementary delays and Walsh code transformation to regenerate the interference which is subtracted from the received signal in memory.

    摘要翻译： 一种能够接收包含用于多个信道的沃尔什编码的信息并且从接收的信息中消除干扰的消息的站和消除方法。 提供存储器用于存储包含多个通道中的每一个的沃尔什码的接收信号以及所述接收信号的反射和/或折射版本，并且提供选择性地耦合到存储器的第一多个信号路径。 信号路径应用相应的延迟和反向沃尔什码变换来分离信道。 此外，干扰所需信道的信道的消除继续进行互补延迟和沃尔什码变换以再生从存储器中的接收信号中减去的干扰。

    Iterative signal-to-interference ratio estimation for WCDMA
    25.
    发明授权
    Iterative signal-to-interference ratio estimation for WCDMA 有权
    WCDMA的迭代信号干扰比估计

    公开(公告)号：US06404826B1

    公开(公告)日：2002-06-11

    申请号：US09218939

    申请日：1998-12-22

    申请人： Timothy M. Schmidl ,  Anand G. Dabak ,  Srinath Hosur

    发明人： Timothy M. Schmidl ,  Anand G. Dabak ,  Srinath Hosur

    IPC分类号： H04L2706

    CPC分类号： H04B1/7097 ,  H04L1/20

    摘要： A circuit is designed with an estimate circuit (132) coupled to receive a plurality of predetermined signals (416-418) from an external source. Each of the predetermined signals is spaced apart in time. The estimate cit produces a first estimate signal in response to at least one of the plurality of predetermined signals. An averaging circuit is coupled to receive a data signal 420 and at least one of the plurality of predetermined signals. The averaging circuit produces an average signal from the data signal and at least one of the plurality of predetermined signals.

    摘要翻译： 电路被设计成具有耦合以从外部源接收多个预定信号（416-418）的估计电路（132）。 每个预定信号在时间上间隔开。 估计值响应于多个预定信号中的至少一个产生第一估计信号。 平均电路被耦合以接收数据信号420和多个预定信号中的至少一个。 平均电路从数据信号和多个预定信号中的至少一个产生平均信号。

    WIRELESS COMMUNICATIONS SYSTEM WITH SECONDARY SYNCHRONIZATION CODE BASED ON VALUES IN PRIMARY SYNCHRONIZATION CODE
    28.
    发明申请
    WIRELESS COMMUNICATIONS SYSTEM WITH SECONDARY SYNCHRONIZATION CODE BASED ON VALUES IN PRIMARY SYNCHRONIZATION CODE 有权
    具有基于同步同步码的值的二次同步代码的无线通信系统

    公开(公告)号：US20110064071A1

    公开(公告)日：2011-03-17

    申请号：US12949413

    申请日：2010-11-18

    申请人： Anand G. Dabak ,  Sundararajan Sriram ,  Srinath Hosur

    发明人： Anand G. Dabak ,  Sundararajan Sriram ,  Srinath Hosur

    IPC分类号： H04J3/06

    CPC分类号： H04B1/7083 ,  H04B1/70735 ,  H04J13/00 ,  H04J13/12

    摘要： A wireless communication system. The system comprises transmitter circuitry (BST1), the transmitter circuitry comprising encoder circuitry (50) for transmitting a plurality of frames (FR). Each of the plurality of frames comprises a primary synchronization code (PCS) and a secondary synchronization code (SSC). The encoder circuitry comprises of circuitry (501) for providing the primary synchronization code in response to a first sequence (32). The encoder circuitry further comprises circuitry (502) for providing the secondary synchronization code in response to a second sequence (54) and a third sequence (56). The second sequence is selected from a plurality of sequences. Each of the plurality of sequences is orthogonal with respect to all other sequences in the plurality of sequences. The third sequence comprises a subset of bits from the first sequence.

    摘要翻译： 无线通信系统。 该系统包括发射机电路（BST1），该发射机电路包括用于传输多个帧（FR）的编码器电路（50）。 多个帧中的每一个包括主同步码（PCS）和辅同步码（SSC）。 编码器电路包括用于响应于第一序列（32）提供主同步码的电路（501）。 编码器电路还包括用于响应于第二序列（54）和第三序列（56）提供辅助同步码的电路（502）。 第二序列从多个序列中选择。 多个序列中的每一个相对于多个序列中的所有其他序列是正交的。 第三序列包括来自第一序列的比特的子集。

    WIRELESS COMMUNICATIONS SYSTEM WITH SECONDARY SYNCHRONIZATION CODE BASED ON VALUES IN PRIMARY SYNCHRONIZATION CODE
    29.
    发明申请
    WIRELESS COMMUNICATIONS SYSTEM WITH SECONDARY SYNCHRONIZATION CODE BASED ON VALUES IN PRIMARY SYNCHRONIZATION CODE 有权
    具有基于同步同步码的值的二次同步代码的无线通信系统

    公开(公告)号：US20100091821A1

    公开(公告)日：2010-04-15

    申请号：US12638468

    申请日：2009-12-15

    申请人： Anand G. Dabak ,  Sundararajan Sriram ,  Srinath Hosur

    发明人： Anand G. Dabak ,  Sundararajan Sriram ,  Srinath Hosur

    IPC分类号： H04B1/707

    CPC分类号： H04B1/7083 ,  H04B1/70735 ,  H04J13/00 ,  H04J13/12

    摘要： A wireless communication system. The system comprises transmitter circuitry (BST1), the transmitter circuitry comprising encoder circuitry (50) for transmitting a plurality of frames (FR). Each of the plurality of frames comprises a primary synchronization code (PCS) and a secondary synchronization code (SSC). The encoder circuitry comprises of circuitry (501) for providing the primary synchronization code in response to a first sequence (32). The encoder circuitry further comprises circuitry (502) for providing the secondary synchronization code in response to a second sequence (54) and a third sequence (56). The second sequence is selected from a plurality of sequences. Each of the plurality of sequences is orthogonal with respect to all other sequences in the plurality of sequences. The third sequence comprises a subset of bits from the first sequence.

    摘要翻译： 无线通信系统。 该系统包括发射机电路（BST1），该发射机电路包括用于传输多个帧（FR）的编码器电路（50）。 多个帧中的每一个包括主同步码（PCS）和辅同步码（SSC）。 编码器电路包括用于响应于第一序列（32）提供主同步码的电路（501）。 编码器电路还包括用于响应于第二序列（54）和第三序列（56）提供辅助同步码的电路（502）。 第二序列从多个序列中选择。 多个序列中的每一个相对于多个序列中的所有其他序列是正交的。 第三序列包括来自第一序列的比特的子集。