公开(公告)号：US20120154184A1

公开(公告)日：2012-06-21

申请号：US13403223

申请日：2012-02-23

申请人： Anand G. Dabak ,  Sundararajan Srinun ,  Srinath Hosur

发明人： Anand G. Dabak ,  Sundararajan Srinun ,  Srinath Hosur

IPC分类号： H03M7/00

CPC分类号： H04B1/7083 ,  H04B1/70735 ,  H04J13/00 ,  H04J13/12

摘要： A wireless communication system. The system comprises transmitter circuitry (BST1), the transmitter circuitry comprising encoder circuitry (50) for transmitting a plurality of frames (FR). Each of the plurality of frames comprises a primary synchronization code (PCS) and a second synchronization code (SSC). The encoder circuitry comprises of circuitry (501) for providing the primary synchronization code in response to a first sequence (32). The encoder circuitry further comprises circuitry (502) for providing the secondary synchronization code in response to a second sequence (54) and a third sequence (56). The second sequence is selected from a plurality of sequences. Each of the plurality of sequences is orthogonal with respect to all other sequences. The third sequence is a subset of bits from the first sequence.

摘要翻译： 无线通信系统。 该系统包括发射机电路（BST1），该发射机电路包括用于传输多个帧（FR）的编码器电路（50）。 多个帧中的每一个包括主同步码（PCS）和第二同步码（SSC）。 编码器电路包括用于响应于第一序列（32）提供主同步码的电路（501）。 编码器电路还包括用于响应于第二序列（54）和第三序列（56）提供辅助同步码的电路（502）。 第二序列从多个序列中选择。 多个序列中的每一个相对于所有其他序列是正交的。 第三个序列是来自第一个序列的比特的子集。

公开(公告)号：US06483821B1

公开(公告)日：2002-11-19

申请号：US09294722

申请日：1999-04-19

申请人： Anand G. Dabak ,  Srinath Hosur ,  Timothy Schmidl

发明人： Anand G. Dabak ,  Srinath Hosur ,  Timothy Schmidl

IPC分类号： H04Q700

CPC分类号： H04L25/0228 ,  H04B1/7115 ,  H04B1/712 ,  H04B2201/70701 ,  H04L1/20 ,  H04L25/0204 ,  H04L25/0236

摘要： The present invention is an improved system and method for transmitting and receiving digital information over mobile communication channels. The present invention includes an enhanced channel estimator (34) which iteratively estimates channel amplitude and phase distortion from received pilot and data signal information at various time instants. The iterative channel estimation scheme of the present invention provides increased performance of the transceiver system which allows for efficiencies such as transmission of a minimal amount of pilot information and reduction in the transmitted power.

摘要翻译： 本发明是一种用于通过移动通信信道发送和接收数字信息的改进的系统和方法。 本发明包括增强信道估计器（34），其在不同的时刻迭代地估计来自接收到的导频的信道幅度和相位失真以及数据信号信息。 本发明的迭代信道估计方案提供了收发机系统的增加的性能，其允许诸如传输最小量的导频信息和减少发射功率的效率。

公开(公告)号：US06356605B1

公开(公告)日：2002-03-12

申请号：US09195942

申请日：1998-11-19

申请人： Srinath Hosur ,  Anand G. Dabak

发明人： Srinath Hosur ,  Anand G. Dabak

IPC分类号： H04B710

CPC分类号： H04B7/0845 ,  H04B1/707 ,  H04B7/06 ,  H04L1/0625

摘要： A circuit is designed with a correction circuit (350) coupled to receive a first estimate signal (&agr;j1), a second estimate signal (&agr;j2), and a plurality of input signals from an external source along plural signal paths. The plurality of input signals includes a first and a second input signal (Rj1, Rj2) The correction circuit produces a first symbol estimate in response to the first and second estimate signals and the first and second input signals. The correction circuit produces a second symbol estimate in response to the first and second estimate signals and the first and second input signals. A combining circuit is coupled to receive a plurality of first symbol estimates including the first symbol estimate and a plurality of second symbol estimates including the second symbol estimate. The combining circuit produces a first symbol signal ({tilde over (S)}1) in response to the plurality of first symbol estimates and a second symbol signal ({tilde over (S)}2) in response to the plurality of second symbol estimates. A synchronization circuit (408) is coupled to receive the first and second symbol signals (400-406) and a first known symbol and a second known symbol (410-416). The synchronization circuit produces a synchronization signal (418) in response to an approximate match between the first symbol signal and the first known symbol and between the second symbol signal and the second known symbol.

摘要翻译： 电路被设计成具有被耦合以从多个信号路径从外部源接收第一估计信号（alphaj1），第二估计信号（alphaj2）以及多个输入信号的校正电路（350）。 所述多个输入信号包括第一和第二输入信号（Rj1，Rj2）。所述校正电路响应于所述第一和第二估计信号以及所述第一和第二输入信号而产生第一符号估计。 校正电路响应于第一和第二估计信号以及第一和第二输入信号产生第二符号估计。 组合电路被耦合以接收包括第一符号估计的多个第一符号估计和包括第二符号估计的多个第二符号估计。 响应于多个第一符号估计，组合电路响应于多个第二符号估计而产生第一符号信号（（S）} 1）和第二符号信号（（S）} 2） 估计。 耦合同步电路（408）以接收第一和第二符号信号（400-406）和第一已知符号和第二已知符号（410-416）。 响应于第一符号信号和第一已知符号之间以及第二符号信号和第二已知符号之间的近似匹配，同步电路产生同步信号（418）。

公开(公告)号：USRE44858E1

公开(公告)日：2014-04-22

申请号：US13136059

申请日：2011-07-20

申请人： Srinath Hosur ,  Anand G. Dabak

发明人： Srinath Hosur ,  Anand G. Dabak

IPC分类号： H04B7/185

CPC分类号： H04B7/0669 ,  H04B1/712 ,  H04B2201/70707 ,  H04W52/08 ,  H04W52/241 ,  H04W52/245 ,  H04W52/42

摘要： A circuit is designed with a measurement circuit (432). The measurement circuit is coupled to receive a first input signal (903) from a first antenna (128) of a transmitter and coupled to receive a second input signal (913) from a second antenna (130) of the transmitter. Each of the first and second signals is transmitted at a first time. The measurement circuit produces an output signal corresponding to a magnitude of the first and second signals. A control circuit (430) is coupled to receive the output signal and a reference signal. The control circuit is arranged to produce a control signal at a second time in response to a comparison of the output signal and the reference signal.

摘要翻译： 电路设计有测量电路（432）。 测量电路被耦合以从发射机的第一天线（128）接收第一输入信号（903），并被耦合以从发射机的第二天线（130）接收第二输入信号（913）。 第一和第二信号中的每一个在第一时间被发送。 测量电路产生对应于第一和第二信号的幅度的输出信号。 控制电路（430）被耦合以接收输出信号和参考信号。 控制电路被布置成响应于输出信号和参考信号的比较而在第二时间产生控制信号。

公开(公告)号：US07103085B1

公开(公告)日：2006-09-05

申请号：US09595561

申请日：2000-06-16

申请人： Anand G. Dabak ,  Sundararajan Sriram ,  Srinath Hosur

发明人： Anand G. Dabak ,  Sundararajan Sriram ,  Srinath Hosur

IPC分类号： H04B1/38

CPC分类号： H04B1/7083 ,  H04B1/70735 ,  H04J13/00 ,  H04J13/12

摘要： A wireless communication system. The system comprises transmitter circuitry (BST1), the transmitter circuitry comprising encoder circuitry (50) for transmitting a plurality of frames (FR). Each of the plurality of frames comprises a primary synchronization code (PCS) and a secondary synchronization code (SSC). The encoder circuitry comprises of circuitry (501) for providing the primary synchronization code in response to a first sequence (32). The encoder circuitry further comprises circuitry (502) for providing the secondary synchronization code in response to a second sequence (54) and a third sequence (56). The second sequence is selected from a plurality of sequences. Each of the plurality of sequences is orthogonal with respect to all other sequences in the plurality of sequences. The third sequence comprises a subset of bits from the first sequence.

摘要翻译： 无线通信系统。 该系统包括发射机电路（BST1），发射机电路包括用于传输多个帧（FR）的编码器电路（50）。 多个帧中的每一个包括主同步码（PCS）和辅同步码（SSC）。 编码器电路包括用于响应于第一序列（32）提供主同步码的电路（50 1）。 编码器电路还包括用于响应于第二序列（54）和第三序列（56）提供辅助同步码的电路（50）。 第二序列从多个序列中选择。 多个序列中的每一个相对于多个序列中的所有其他序列是正交的。 第三序列包括来自第一序列的比特的子集。

公开(公告)号：US06977910B1

公开(公告)日：2005-12-20

申请号：US09224401

申请日：1998-12-31

申请人： Srinath Hosur ,  Anand G. Dabak

发明人： Srinath Hosur ,  Anand G. Dabak

IPC分类号： H04B1/00 ,  H04B1/02 ,  H04B1/707 ,  H04B7/005 ,  H04B7/185 ,  H04B7/216

CPC分类号： H04B7/0669 ,  H04B1/712 ,  H04B2201/70707 ,  H04W52/08 ,  H04W52/241 ,  H04W52/245 ,  H04W52/42

摘要： A circuit is designed with a measurement circuit (432). The measurement circuit is coupled to receive a first input signal (903) from a first antenna (128) of a transmitter and coupled to receive a second input signal (913) from a second antenna (130) of the transmitter. Each of the first and second signals is transmitted at a first time. The measurement circuit produces an output signal corresponding to a magnitude of the first and second signals. A control circuit (430) is coupled to receive the output signal and a reference signal. The control circuit is arranged to produce a control signal at a second time in response to a comparison of the output signal and the reference signal.

摘要翻译： 电路设计有测量电路（432）。 测量电路被耦合以从发射机的第一天线（128）接收第一输入信号（903），并被耦合以从发射机的第二天线（130）接收第二输入信号（913）。 第一和第二信号中的每一个在第一时间被发送。 测量电路产生对应于第一和第二信号的幅度的输出信号。 控制电路（430）被耦合以接收输出信号和参考信号。 控制电路被布置成响应于输出信号和参考信号的比较而在第二时间产生控制信号。

公开(公告)号：US20120147730A1

公开(公告)日：2012-06-14

申请号：US13403236

申请日：2012-02-23

申请人： Anand G. Dabak ,  Sundararajan Sriram ,  Srinath Hosur

发明人： Anand G. Dabak ,  Sundararajan Sriram ,  Srinath Hosur

IPC分类号： H04J11/00

CPC分类号： H04B1/7083 ,  H04B1/70735 ,  H04J13/00 ,  H04J13/12

摘要： A wireless communication system. The system comprises transmitter circuitry (BST1), the transmitter circuitry comprising encoder circuitry (50) for transmitting a plurality of frames (FR). Each of the plurality of frames comprises a primary synchronization code (PCS) and a second synchronization code (SSC). The encoder circuitry comprises of circuitry (501) for providing the primary synchronization code in response to a first sequence (32). The encoder circuitry further comprises circuitry (502) for providing the secondary synchronization code in response to a second sequence (54) and a third sequence (56). The second sequence is selected from a plurality of sequences. Each of the plurality of sequences is orthogonal with respect to all other sequences. The third sequence is a subset of bits from the first sequence.

公开(公告)号：USRE42919E1

公开(公告)日：2011-11-15

申请号：US11454181

申请日：2006-06-16

申请人： Srinath Hosur ,  Anand G. Dabak

发明人： Srinath Hosur ,  Anand G. Dabak

IPC分类号： H04B7/185 ,  H04B1/00 ,  H04B7/216 ,  H03C7/02 ,  H04J3/00

CPC分类号： H04B7/0669 ,  H04B1/712 ,  H04B2201/70707 ,  H04W52/08 ,  H04W52/241 ,  H04W52/245 ,  H04W52/42

摘要： A circuit is designed with a measurement circuit (432). The measurement circuit is coupled to receive a first input signal (903) from a first antenna (128) of a transmitter and coupled to receive a second input signal (913) from a second antenna (130) of the transmitter. Each of the first and second signals is transmitted at a first time. The measurement circuit produces an output signal corresponding to a magnitude of the first and second signals. A control circuit (430) is coupled to receive the output signal and a reference signal. The control circuit is arranged to produce a control signal at a second time in response to a comparison of the output signal and the reference signal.

摘要翻译： 电路设计有测量电路（432）。 测量电路被耦合以从发射机的第一天线（128）接收第一输入信号（903），并被耦合以从发射机的第二天线（130）接收第二输入信号（913）。 第一和第二信号中的每一个在第一时间被发送。 测量电路产生对应于第一和第二信号的幅度的输出信号。 控制电路（430）被耦合以接收输出信号和参考信号。 控制电路被布置成响应于输出信号和参考信号的比较而在第二时间产生控制信号。

公开(公告)号：US07860152B2

公开(公告)日：2010-12-28

申请号：US12638468

申请日：2009-12-15

申请人： Anand G. Dabak ,  Sundararajan Sriram ,  Srinath Hosur

发明人： Anand G. Dabak ,  Sundararajan Sriram ,  Srinath Hosur

IPC分类号： H04B1/69 ,  H04B1/707 ,  H04B1/713

CPC分类号： H04B1/7083 ,  H04B1/70735 ,  H04J13/00 ,  H04J13/12

摘要： A wireless communication system. The system comprises transmitter circuitry (BST1), the transmitter circuitry comprising encoder circuitry (50) for transmitting a plurality of frames (FR). Each of the plurality of frames comprises a primary synchronization code (PCS) and a secondary synchronization code (SSC). The encoder circuitry comprises of circuitry (501) for providing the primary synchronization code in response to a first sequence (32). The encoder circuitry further comprises circuitry (502) for providing the secondary synchronization code in response to a second sequence (54) and a third sequence (56). The second sequence is selected from a plurality of sequences. Each of the plurality of sequences is orthogonal with respect to all other sequences in the plurality of sequences. The third sequence comprises a subset of bits from the first sequence.

摘要翻译： 无线通信系统。 该系统包括发射机电路（BST1），该发射机电路包括用于传输多个帧（FR）的编码器电路（50）。 多个帧中的每一个包括主同步码（PCS）和辅同步码（SSC）。 编码器电路包括用于响应于第一序列（32）提供主同步码的电路（501）。 编码器电路还包括用于响应于第二序列（54）和第三序列（56）提供辅助同步码的电路（502）。 第二序列从多个序列中选择。 多个序列中的每一个相对于多个序列中的所有其他序列是正交的。 第三序列包括来自第一序列的比特的子集。

公开(公告)号：US06829290B1

公开(公告)日：2004-12-07

申请号：US09669394

申请日：2000-09-26

申请人： Timothy M. Schmidl ,  Alan Gatherer ,  Srinath Hosur ,  Anand G. Dabak

发明人： Timothy M. Schmidl ,  Alan Gatherer ,  Srinath Hosur ,  Anand G. Dabak

IPC分类号： H04B169

CPC分类号： H04B1/7115 ,  H04B1/709 ,  H04B1/7117 ,  H04B2201/70707

摘要： A wireless receiver (UST). The receiver comprises at least one antenna (ATU) for receiving a plurality of frames (FR) in a form of a plurality of paths. Each of the plurality of frames comprises a plurality of time slots (SLN), and each of the plurality of time slots comprises a plurality of symbols. Further, each of the plurality of paths has a corresponding sample position, wherein the plurality of symbols comprise a primary synchronization code symbol (PSC). The receiver further comprises circuitry (52) for correlating a primary synchronization code across a group of the plurality of symbols, and circuitry for identifying a plurality of path positions within the group. Each of the plurality of path positions corresponds to a respective one of a plurality of largest-amplitude paths represented within the group as detected in response to the circuitry for correlating. Finally, the receiver comprises circuitry for combining (54, 58) the plurality of largest-amplitude paths in response to identification of those paths by the circuitry for identifying.

摘要翻译： 无线接收器（UST）。 接收机包括用于接收多个路径形式的多个帧（FR）的至少一个天线（ATU）。 多个帧中的每一个包括多个时隙（SLN），并且多个时隙中的每一个包括多个符号。 此外，多个路径中的每一个具有对应的采样位置，其中多个符号包括主同步码符号（PSC）。 接收机还包括用于将多个符号组中的主同步码相互关联的电路（52）以及用于识别组内的多个路径位置的电路​​。 多个路径位置中的每一个对应于响应于用于相关的电路检测到的在组内表示的多个最大幅度路径中的相应一个路径位置。 最后，接收机包括用于响应于用于识别的电路的那些路径的识别来组合（54,58）多个最大幅度路径的电路。