Abstract:
An apparatus and method for processing pixel depth information eliminates stalling of data in a pixel pipeline, by performing late Z processing for one or more pixels currently in the pixel pipeline and early Z processing for one or more pixels entering the pixel pipeline. The apparatus and method also includes determining whether the late Z processing for the one or more pixels currently in the pixel pipeline has been completed. The apparatus and method also includes solely performing early Z processing for subsequent pixels entering the pixel pipeline responsive to determining that late Z processing for the one or more pixels currently in the pixel pipeline has been completed. The methods and apparatus, facilitates concurrent processing of early and late Z data to avoid flushing portions of the pixel pipeline.
Abstract:
A method and apparatus for nested control flow includes a processor having at least one context bit. The processor includes a plurality of arithmetic logic units for performing single instruction multiple data (SIMD) operations. The method and apparatus further includes a first memory device storing a plurality of instructions wherein each of the plurality of instructions includes a plurality of extra bits. The processor is operative to execute the instructions based on the extra bits and in conjunction with a context bit. The method and apparatus further includes a second memory device, such as a general purpose register operably coupled to the processor, the second memory device receiving an incrementing counter instruction upon the execution of one of the plurality of instructions. As such, the method and apparatus allows for nested control flow through a single context bit in conjunction with instructions having a plurality of extra bits.
Abstract:
In general, techniques are described for visibility-based state updates in graphical processing units (GPUs). A device that renders image data comprising a memory configured to store state data and a GPU may implement the techniques. The GPU may be configured to perform a multi-pass rendering process to render an image from the image data. The GPU determines visibility information for a plurality of objects defined by the image data during a first pass of the multi-pass rendering process. The visibility information indicates whether each of the plurality of objects will be visible in the image rendered from the image data during a second pass of the multi-pass rendering process. The GPU then retrieves the state data from the memory for use by the second pass of the multi-pass rendering process in rendering the plurality of objects of the image data based on the visibility information.
Abstract:
This disclosure is directed to deferred preemption techniques for scheduling graphics processing unit (GPU) command streams for execution on a GPU. A host CPU is described that is configured to control a GPU to perform deferred-preemption scheduling. For example, a host CPU may select one or more locations in a GPU command stream as being one or more locations at which preemption is allowed to occur in response to receiving a preemption notification, and may place one or more tokens in the GPU command stream based on the selected one or more locations. The tokens may indicate to the GPU that preemption is allowed to occur at the selected one or more locations. This disclosure further describes a GPU configured to preempt execution of a GPU command stream based on one or more tokens placed in a GPU command stream.
Abstract:
In general, in an aspect, the invention provides a multimedia entertainment system including a communication link, a video source coupled to the communication link and configured to produce a video signal and provide the video signal to the communication link, a video display coupled to the communication link and configured to receive the video signal from the video source via the communication link, and to provide dynamic display characteristic information indicative of a display capability of the video display to the video source via the communication link, wherein the video source is configured to receive the dynamic display characteristic information and to produce the video signal as a function of the dynamic display characteristic information, and wherein the video display is configured to display a video image in accordance with the video signal provided by the video source.
Abstract:
In general, techniques are described for visibility-based state updates in graphical processing units (GPUs). A device that renders image data comprising a memory configured to store state data and a GPU may implement the techniques. The GPU may be configured to perform a multi-pass rendering process to render an image from the image data. The GPU determines visibility information for a plurality of objects defined by the image data during a first pass of the multi-pass rendering process. The visibility information indicates whether each of the plurality of objects will be visible in the image rendered from the image data during a second pass of the multi-pass rendering process. The GPU then retrieves the state data from the memory for use by the second pass of the multi-pass rendering process in rendering the plurality of objects of the image data based on the visibility information.
Abstract:
In general, in an aspect, the invention provides a multimedia entertainment system including a communication link, a video source coupled to the communication link and configured to produce a video signal and provide the video signal to the communication link, a video display coupled to the communication link and configured to receive the video signal from the video source via the communication link, and to provide dynamic display characteristic information indicative of a display capability of the video display to the video source via the communication link, wherein the video source is configured to receive the dynamic display characteristic information and to produce the video signal as a function of the dynamic display characteristic information, and wherein the video display is configured to display a video image in accordance with the video signal provided by the video source.
Abstract:
A method and system for higher level filtering uses a native bilinear filter, typically found in a texture mapper, and combines a plurality of bilinear filter results from the bilinear filter to produce a higher level filtered texel value. A native bilinear filter is operative to generate bilinear filtered texel values by performing a plurality of bilinearly filtered texture fetches using bilinear filter fetch coordinates. The method and system combines the plurality of bilinear filtered texel values with a plurality of weights to generate the higher level filtered texel value.
Abstract:
A visual display system uses commercial graphics processing units (GPUs) to determine an occlusion of calligraphic light points (CLPs) in a visual display. A color buffer pointer address of the GPUs is changed to point to a CLP subpixel counter and color datum associated with each CLP is changed to an identifier of the respective CLPs so that an occlusion count of GPU indications can be accumulated.
Abstract:
A method and apparatus for interpolating pixel parameters based on the plurality of vertex values includes operating first and a setup mode and a calculation mode. The method and apparatus includes, while in a setup mode, generating a plurality of differential geometric values based on the plurality of vertex values, wherein the differential geometric values are independent of a parameter slope between the plurality of vertex values. While in a calculation mode, a first geometric value and second geometric value are determined based on a pixel value, a plurality of vertex values and the differential geometric values. A pixel value is determined for each of the plurality of pixels based on the vertex parameter value, the first geometric value and the second geometric value. Thereupon, pixel parameters may be interpolated on a per-pixel basis reusing the differential geometric values.