公开(公告)号：US20110274298A1

公开(公告)日：2011-11-10

申请号：US12978585

申请日：2010-12-26

Applicant: Bin YANG

Inventor： Bin YANG

IPC: H04R11/04

CPC classification number: H04R19/016 ,  H04R2201/003

Abstract: A MEMS microphone includes a silicon substrate defining an opening, a diaphragm being supported above the substrate and a backplate opposite from the diaphragm for forming a capacitor together with the diaphragm. The diaphragm includes a central vibrating portion and a plurality of serpentine segments extending from an edge of the vibrating portion. Each of the serpentine segments includes a first spring and a second spring symmetric to the first spring about an axis extending from a center of the vibrating portion. Each spring includes a first end connecting to the edge of the vibrating portion, a bending portion and a second end extending from the bending portion for anchoring the diaphragm to the substrate. The bending portion extends along a path having the same outline as that of the vibrating portion.

Abstract translation: MEMS麦克风包括限定开口的硅衬底，支撑在衬底上方的隔膜和与隔膜相对的背板，用于与隔膜一起形成电容器。 隔膜包括中心振动部分和从振动部分的边缘延伸的多个蛇形段。 每个蛇形段包括与从第一弹簧对称的第一弹簧和第二弹簧，所述第一弹簧和第二弹簧围绕从振动部分的中心延伸的轴线对称。 每个弹簧包括连接到振动部分的边缘的第一端，弯曲部分和从弯曲部分延伸的用于将隔膜锚定到基底的第二端。 弯曲部沿着与振动部的轮廓相同的轮廓的路径延伸。

公开(公告)号：US20110169084A1

公开(公告)日：2011-07-14

申请号：US12687610

申请日：2010-01-14

Applicant: Bin YANG ,  Rohit PAL ,  Michael HARGROVE

Inventor： Bin YANG ,  Rohit PAL ,  Michael HARGROVE

IPC: H01L29/786 ,  H01L27/12 ,  H01L21/86

CPC classification number: H01L27/12 ,  H01L21/84 ,  H01L21/845 ,  H01L23/485 ,  H01L27/1211

Abstract: A method of fabricating a semiconductor device with back side conductive plugs is provided here. The method begins by forming a gate structure overlying a semiconductor-on-insulator (SOI) substrate. The SOI substrate has a support layer, an insulating layer overlying the support layer, an active semiconductor region overlying the insulating layer, and an isolation region outboard of the active semiconductor region. A first section of the gate structure is formed overlying the isolation region and a second section of the gate structure is formed overlying the active semiconductor region. The method continues by forming source/drain regions in the active semiconductor region, and thereafter removing the support layer from the SOI substrate. Next, the method forms conductive plugs for the gate structure and the source/drain regions, where each of the conductive plugs passes through the insulating layer.

Abstract translation: 此处提供制造具有背面导电插头的半导体器件的方法。 该方法通过形成覆盖绝缘体上半导体（SOI）衬底的栅极结构开始。 SOI衬底具有支撑层，覆盖在支撑层上的绝缘层，覆盖绝缘层的有源半导体区域和有源半导体区域外侧的隔离区域。 栅极结构的第一部分形成在隔离区域的上方，栅极结构的第二部分形成在有源半导体区域的上方。 该方法通过在有源半导体区域中形成源极/漏极区域继续，然后从SOI衬底去除支撑层。 接下来，该方法形成用于栅极结构和源极/漏极区域的导电插塞，其中每个导电插塞穿过绝缘层。