公开(公告)号：US20110320786A1

公开(公告)日：2011-12-29

申请号：US12823226

申请日：2010-06-25

申请人： Tong Chen ,  Brian Flachs ,  Brad W. Michael ,  Mark R. Nutter ,  John K.P. O'Brien ,  Kathryn M. O'Brien ,  Tao Zhang

发明人： Tong Chen ,  Brian Flachs ,  Brad W. Michael ,  Mark R. Nutter ,  John K.P. O'Brien ,  Kathryn M. O'Brien ,  Tao Zhang

IPC分类号： G06F9/38 ,  G06F9/45 ,  G06F12/08

CPC分类号： G06F8/4442 ,  G06F9/3806 ,  G06F12/0875 ,  G06F12/12

摘要： Mechanisms are provided for evicting cache lines from an instruction cache of the data processing system. The mechanisms store, for a portion of code in a current cache line, a linked list of call sites that directly or indirectly target the portion of code in the current cache line. A determination is made as to whether the current cache line is to be evicted from the instruction cache. The linked list of call sites is processed to identify one or more rewritten branch instructions having associated branch stubs, that either directly or indirectly target the portion of code in the current cache line. In addition, the one or more rewritten branch instructions are rewritten to restore the one or more rewritten branch instructions to an original state based on information in the associated branch stubs.

摘要翻译： 提供用于从数据处理系统的指令高速缓存中驱逐高速缓存行的机制。 机制存储当前高速缓存行中代码的一部分，直接或间接地定位当前高速缓存行中代码部分的调用站点的链接列表。 确定当前高速缓存行是否将从指令高速缓存中逐出。 处理呼叫站点的链接列表以识别具有相关联的分支存根的一个或多个重写的分支指令，其直接或间接地对目标当前高速缓存行中的代码部分。 此外，重写一个或多个重写的分支指令，以基于相关联的分支存根中的信息将一个或多个重写的分支指令恢复到原始状态。

公开(公告)号：US08713548B2

公开(公告)日：2014-04-29

申请号：US13443188

申请日：2012-04-10

申请人： Tong Chen ,  Brian Flachs ,  Brad W. Michael ,  Mark R. Nutter ,  John K. P. O'Brien ,  Kathryn M. O'Brien ,  Tao Zhang

发明人： Tong Chen ,  Brian Flachs ,  Brad W. Michael ,  Mark R. Nutter ,  John K. P. O'Brien ,  Kathryn M. O'Brien ,  Tao Zhang

IPC分类号： G06F9/45

CPC分类号： G06F8/4436 ,  G06F8/433 ,  G06F8/4442

摘要： Mechanisms are provided for rewriting branch instructions in a portion of code. The mechanisms receive a portion of source code having an original branch instruction. The mechanisms generate a branch stub for the original branch instruction. The branch stub stores information about the original branch instruction including an original target address of the original branch instruction. Moreover, the mechanisms rewrite the original branch instruction so that a target of the rewritten branch instruction references the branch stub. In addition, the mechanisms output compiled code including the rewritten branch instruction and the branch stub for execution by a computing device. The branch stub is utilized by the computing device at runtime to determine if execution of the rewritten branch instruction can be redirected directly to a target instruction corresponding to the original target address in an instruction cache of the computing device without intervention by an instruction cache runtime system.

摘要翻译： 提供了用于在一部分代码中重写分支指令的机制。 该机制接收一部分具有原始分支指令的源代码。 机制为原始分支指令生成分支存根。 分支存根存储关于原始分支指令的信息，包括原始分支指令的原始目标地址。 此外，机制重写原始分支指令，使得重写的分支指令的目标引用分支存根。 此外，机制输出编译代码，包括重写的分支指令和分支存根，以供计算设备执行。 计算设备在运行时利用分支存根来确定重写的分支指令的执行是否可以被直接重定向到与计算设备的指令高速缓存中的原始目标地址相对应的目标指令，而无需指令高速缓存运行时系统的干预 。

公开(公告)号：US08631225B2

公开(公告)日：2014-01-14

申请号：US12823194

申请日：2010-06-25

申请人： Tong Chen ,  Brian Flachs ,  Brad W. Michael ,  Mark R. Nutter ,  John K. P. O'Brien ,  Kathryn M. O'Brien ,  Tao Zhang

发明人： Tong Chen ,  Brian Flachs ,  Brad W. Michael ,  Mark R. Nutter ,  John K. P. O'Brien ,  Kathryn M. O'Brien ,  Tao Zhang

IPC分类号： G06F9/44

CPC分类号： G06F9/3806 ,  G06F12/0875

摘要： Mechanisms are provided for dynamically rewriting branch instructions in a portion of code. The mechanisms execute a branch instruction in the portion of code. The mechanisms determine if a target instruction of the branch instruction, to which the branch instruction branches, is present in an instruction cache associated with the processor. Moreover, the mechanisms directly branch execution of the portion of code to the target instruction in the instruction cache, without intervention from an instruction cache runtime system, in response to a determination that the target instruction is present in the instruction cache. In addition, the mechanisms redirect execution of the portion of code to the instruction cache runtime system in response to a determination that the target instruction cannot be determined to be present in the instruction cache.

公开(公告)号：US20120198429A1

公开(公告)日：2012-08-02

申请号：US13444907

申请日：2012-04-12

申请人： Tong Chen ,  Brian Flachs ,  Brad W. Michael ,  Mark R. Nutter ,  John K.P. O'Brien ,  Kathryn M. O'Brien ,  Tao Zhang

发明人： Tong Chen ,  Brian Flachs ,  Brad W. Michael ,  Mark R. Nutter ,  John K.P. O'Brien ,  Kathryn M. O'Brien ,  Tao Zhang

IPC分类号： G06F9/45

CPC分类号： G06F8/4442

摘要： Mechanisms are provided for arranging binary code to reduce instruction cache conflict misses. These mechanisms generate a call graph of a portion of code. Nodes and edges in the call graph are weighted to generate a weighted call graph. The weighted call graph is then partitioned according to the weights, affinities between nodes of the call graph, and the size of cache lines in an instruction cache of the data processing system, so that binary code associated with one or more subsets of nodes in the call graph are combined into individual cache lines based on the partitioning. The binary code corresponding to the partitioned call graph is then output for execution in a computing device.

摘要翻译： 提供了用于布置二进制代码以减少指令高速缓存冲突未命中的机制。 这些机制产生一部分代码的调用图。 调用图中的节点和边被加权以生成加权调用图。 然后根据权重，调用图的节点之间的亲和度和数据处理系统的指令高速缓存中的高速缓存行的大小来分配加权调用图，使得与一个或多个节点的子集相关联的二进制代码 调用图被组合到基于分区的各个高速缓存行。 然后输出与划分的调用图对应的二进制代码，以在计算设备中执行。

公开(公告)号：US20080092006A1

公开(公告)日：2008-04-17

申请号：US11533432

申请日：2006-09-20

申请人： Nikhil Dakwala ,  Jonathan J. Dement ,  Sang H. Dhong ,  Brian Flachs ,  Gilles Gervais ,  Brad W. Michael

发明人： Nikhil Dakwala ,  Jonathan J. Dement ,  Sang H. Dhong ,  Brian Flachs ,  Gilles Gervais ,  Brad W. Michael

IPC分类号： G01R31/28 ,  G06F11/00

CPC分类号： G01R31/3187 ,  G01R31/318575

摘要： A method and system for mitigating the impact of voltage supply variations on logic built-in self-test (LBIST) results. The method includes, but is not limited to: creating a set of customized LBIST activation patterns during IC design; propagating the activation patterns from the scan-able latches through the non-scan latches to the device under test; propagating the data from the device under test through the non-scan latches to the scan-able latches; capturing the data in a scan-able latch; and performing each test cycle independently such that the impact of voltage supply variations between test cycles is eliminated.

摘要翻译： 一种用于减轻电压供应变化对逻辑内置自检（LBIST）结果的影响的方法和系统。 该方法包括但不限于：在IC设计期间创建一组定制的LBIST激活模式; 将激活模式从可扫描锁存器通过非扫描锁存器传播到被测器件; 通过非扫描锁存器将数据从被测设备传播到可扫描的锁存器; 在可扫描锁存器中捕获数据; 并且独立地执行每个测试循环，使得消除了测试周期之间的电压供应变化的影响。

公开(公告)号：US20080082887A1

公开(公告)日：2008-04-03

申请号：US11531287

申请日：2006-09-13

申请人： Sang H. Dhong ,  Brian Flachs ,  Gilles Gervais ,  Brad W. Michael ,  Mack W. Riley

发明人： Sang H. Dhong ,  Brian Flachs ,  Gilles Gervais ,  Brad W. Michael ,  Mack W. Riley

IPC分类号： G01R31/28 ,  G06F11/00

CPC分类号： G01R31/318536 ,  G01R31/318575

摘要： A system and method for modifying a test pattern to control power supply noise are provided. A portion of a sequence of states in a test sequence of a test pattern waveform is modified so as to achieve a circuit voltage, e.g., an on-chip voltage, which approximates a nominal circuit voltage, such as produced by the application of other portions of the sequence of states in the same or different test sequences. For example, hold state cycles or shift-scan state cycles may be inserted or removed prior to test state cycles in the test pattern waveform. The insertion/removal shifts the occurrence of the test state cycles within the test pattern waveform so as to adjust the voltage response of the test state cycles so that they more closely approximate a nominal voltage response. In this way, false failures due to noise in the voltage supply may be eliminated.

摘要翻译： 提供了一种用于修改测试模式以控制电源噪声的系统和方法。 修改测试图形波形的测试序列中的状态序列的一部分被修改，以便实现近似标称电路电压的电路电压，例如片上电压，例如通过施加其它部分产生的电压 的相同或不同测试序列中的状态序列。 例如，保持状态周期或移位扫描状态周期可以在测试模式波形中的测试状态周期之前被插入或移除。 插入/移除将测试状态周期的发生移动到测试图形波形内，以便调整测试状态周期的电压响应，使得它们更接近于标称电压响应。 以这种方式，可以消除由于电压源中的噪声引起的错误故障。

公开(公告)号：US09459851B2

公开(公告)日：2016-10-04

申请号：US12823244

申请日：2010-06-25

申请人： Tong Chen ,  Brian Flachs ,  Brad W. Michael ,  Mark R. Nutter ,  John K. P. O'Brien ,  Kathryn M. O'Brien ,  Tao Zhang

发明人： Tong Chen ,  Brian Flachs ,  Brad W. Michael ,  Mark R. Nutter ,  John K. P. O'Brien ,  Kathryn M. O'Brien ,  Tao Zhang

IPC分类号： G06F9/45

CPC分类号： G06F8/4442

摘要： Mechanisms are provided for arranging binary code to reduce instruction cache conflict misses. These mechanisms generate a call graph of a portion of code. Nodes and edges in the call graph are weighted to generate a weighted call graph. The weighted call graph is then partitioned according to the weights, affinities between nodes of the call graph, and the size of cache lines in an instruction cache of the data processing system, so that binary code associated with one or more subsets of nodes in the call graph are combined into individual cache lines based on the partitioning. The binary code corresponding to the partitioned call graph is then output for execution in a computing device.

摘要翻译： 提供了用于布置二进制代码以减少指令高速缓存冲突未命中的机制。 这些机制产生一部分代码的调用图。 调用图中的节点和边被加权以生成加权调用图。 然后根据权重，调用图的节点之间的亲和度和数据处理系统的指令高速缓存中的高速缓存行的大小来分配加权调用图，使得与一个或多个节点的子集相关联的二进制代码 调用图被组合到基于分区的各个高速缓存行。 然后输出与划分的调用图对应的二进制代码，以在计算设备中执行。

公开(公告)号：US08522225B2

公开(公告)日：2013-08-27

申请号：US12823204

申请日：2010-06-25

申请人： Tong Chen ,  Brian Flachs ,  Brad W. Michael ,  Mark R. Nutter ,  John K. P. O'Brien ,  Kathryn M. O'Brien ,  Tao Zhang

发明人： Tong Chen ,  Brian Flachs ,  Brad W. Michael ,  Mark R. Nutter ,  John K. P. O'Brien ,  Kathryn M. O'Brien ,  Tao Zhang

IPC分类号： G06F9/45

CPC分类号： G06F8/4436 ,  G06F8/433 ,  G06F8/4442

摘要： Mechanisms are provided for rewriting branch instructions in a portion of code. The mechanisms receive a portion of source code having an original branch instruction. The mechanisms generate a branch stub for the original branch instruction. The branch stub stores information about the original branch instruction including an original target address of the original branch instruction. Moreover, the mechanisms rewrite the original branch instruction so that a target of the rewritten branch instruction references the branch stub. In addition, the mechanisms output compiled code including the rewritten branch instruction and the branch stub for execution by a computing device. The branch stub is utilized by the computing device at runtime to determine if execution of the rewritten branch instruction can be redirected directly to a target instruction corresponding to the original target address in an instruction cache of the computing device without intervention by an instruction cache runtime system.

摘要翻译： 提供了用于在一部分代码中重写分支指令的机制。 该机制接收一部分具有原始分支指令的源代码。 机制为原始分支指令生成分支存根。 分支存根存储关于原始分支指令的信息，包括原始分支指令的原始目标地址。 此外，机制重写原始分支指令，使得重写的分支指令的目标引用分支存根。 此外，机制输出编译代码，包括重写的分支指令和分支存根，以供计算设备执行。 计算设备在运行时利用分支存根来确定重写的分支指令的执行是否可以被直接重定向到与计算设备的指令高速缓存中的原始目标地址相对应的目标指令，而无需指令高速缓存运行时系统的干预 。

公开(公告)号：US20120204016A1

公开(公告)日：2012-08-09

申请号：US13443188

申请日：2012-04-10

申请人： Tong Chen ,  Brian Flachs ,  Brad W. Michael ,  Mark R. Nutter ,  John K.P. O'Brien ,  Kathryn M. O'Brien ,  Tao Zhang

发明人： Tong Chen ,  Brian Flachs ,  Brad W. Michael ,  Mark R. Nutter ,  John K.P. O'Brien ,  Kathryn M. O'Brien ,  Tao Zhang

IPC分类号： G06F9/318

CPC分类号： G06F8/4436 ,  G06F8/433 ,  G06F8/4442

摘要： Mechanisms are provided for rewriting branch instructions in a portion of code. The mechanisms receive a portion of source code having an original branch instruction. The mechanisms generate a branch stub for the original branch instruction. The branch stub stores information about the original branch instruction including an original target address of the original branch instruction. Moreover, the mechanisms rewrite the original branch instruction so that a target of the rewritten branch instruction references the branch stub. In addition, the mechanisms output compiled code including the rewritten branch instruction and the branch stub for execution by a computing device. The branch stub is utilized by the computing device at runtime to determine if execution of the rewritten branch instruction can be redirected directly to a target instruction corresponding to the original target address in an instruction cache of the computing device without intervention by an instruction cache runtime system.

摘要翻译： 提供了用于在一部分代码中重写分支指令的机制。 该机制接收一部分具有原始分支指令的源代码。 机制为原始分支指令生成分支存根。 分支存根存储关于原始分支指令的信息，包括原始分支指令的原始目标地址。 此外，机制重写原始分支指令，使得重写的分支指令的目标引用分支存根。 此外，机制输出编译代码，包括重写的分支指令和分支存根，以供计算设备执行。 计算设备在运行时利用分支存根来确定重写的分支指令的执行是否可以被直接重定向到与计算设备的指令高速缓存中的原始目标地址相对应的目标指令，而无需指令高速缓存运行时系统的干预 。

公开(公告)号：US20120198170A1

公开(公告)日：2012-08-02

申请号：US13444890

申请日：2012-04-12

申请人： Tong Chen ,  Brian Flachs ,  Brad W. Michael ,  Mark R. Nutter ,  John K.P. O'Brien ,  Kathryn M. O'Brien ,  Tao Zhang

发明人： Tong Chen ,  Brian Flachs ,  Brad W. Michael ,  Mark R. Nutter ,  John K.P. O'Brien ,  Kathryn M. O'Brien ,  Tao Zhang

IPC分类号： G06F12/08 ,  G06F9/38

CPC分类号： G06F8/4442 ,  G06F9/3806 ,  G06F12/0875 ,  G06F12/12

摘要： Mechanisms are provided for evicting cache lines from an instruction cache of the data processing system. The mechanisms store, for a portion of code in a current cache line, a linked list of call sites that directly or indirectly target the portion of code in the current cache line. A determination is made as to whether the current cache line is to be evicted from the instruction cache. The linked list of call sites is processed to identify one or more rewritten branch instructions having associated branch stubs, that either directly or indirectly target the portion of code in the current cache line. In addition, the one or more rewritten branch instructions are rewritten to restore the one or more rewritten branch instructions to an original state based on information in the associated branch stubs.

摘要翻译： 提供用于从数据处理系统的指令高速缓存中驱逐高速缓存行的机制。 机制存储当前高速缓存行中代码的一部分，直接或间接地定位当前高速缓存行中代码部分的调用站点的链接列表。 确定当前高速缓存行是否将从指令高速缓存中逐出。 处理呼叫站点的链接列表以识别具有相关联的分支存根的一个或多个重写的分支指令，其直接或间接地对目标当前高速缓存行中的代码部分。 此外，重写一个或多个重写的分支指令，以基于相关联的分支存根中的信息将一个或多个重写的分支指令恢复到原始状态。