SILICON PHOTONICS PLATFORM WITH INTEGRATED OXIDE TRENCH EDGE COUPLER STRUCTURE

    公开(公告)号:US20200241202A1

    公开(公告)日:2020-07-30

    申请号:US16259998

    申请日:2019-01-28

    Abstract: Embodiments disclosed herein generally relate to optical coupling between a highly-confined waveguide region and a low confined waveguide region in an optical device. The low confined waveguide region includes a trench in a substrate of the optical device in order to provide additional dielectric layer thickness for insulation between the substrate of the optical device and waveguides for light signals having a low optical mode. The low confined waveguide region is coupled to the highly-confined waveguide region via a waveguide overlap and in some embodiments via an intermediary coupling waveguide.

    WAFER LEVEL OPTICAL PROBING STRUCTURES FOR SILICON PHOTONICS

    公开(公告)号:US20180313718A1

    公开(公告)日:2018-11-01

    申请号:US15582306

    申请日:2017-04-28

    CPC classification number: G01M11/30 G02B6/12 G02B6/122 G02B6/13 G02B2006/1213

    Abstract: Embodiments herein describe techniques for testing optical components in a photonic chip using a testing structure disposed in a sacrificial region of a wafer. In one embodiment, the wafer is processed to form multiple photonic chips integrated into the wafer. While forming optical components in the photonic chips (e.g., modulators, detectors, waveguides, etc.), a testing structure can be formed in one or more sacrificial regions in the wafer. In one embodiment, the testing structure is arranged near an edge coupler in the photonic chip such that an optical signal can be transferred between the photonic chip and the testing structure. Moreover, the testing structure has a grating coupler disposed at or near a top surface of the wafer which permits optical signals to be transmitted into, or received from, the grating coupler when an optical probe is arranged above the grating coupler.

    HIGH EFFICIENCY GRATING COUPLER FOR A LASER SOURCE

    公开(公告)号:US20230122662A1

    公开(公告)日:2023-04-20

    申请号:US17451265

    申请日:2021-10-18

    Abstract: A grating coupler with a wafer bonded configuration includes: a substrate; an oxide layer disposed on the substrate; a silicon nitride layer disposed above the oxide layer; a first silicon layer disposed above the silicon nitride layer; a second silicon layer disposed above the first silicon layer; and a bi-layer grating disposed above the silicon nitride layer. The bi-layer grating includes (i) a first etched layer of the first silicon layer and (ii) a second etched layer of the second silicon layer.

    FABRICATION-TOLERANT ON-CHIP MULTIPLEXERS AND DEMULTIPLEXERS

    公开(公告)号:US20230119450A1

    公开(公告)日:2023-04-20

    申请号:US17451247

    申请日:2021-10-18

    Abstract: Fabrication-tolerant on-chip multiplexers and demultiplexers are provides via a lattice filter interleaver configured to receive an input signal including a plurality of individual signals and to produce a first interleaved signal with a first subset of the plurality of individual signals and a second interleaved signal with a second subset of the plurality of individual signals; a first Bragg interleaver configured to receive the first interleaved signal and produce a first output signal including a first individual signal of the plurality of individual signals and a second output signal including a second individual signal of the plurality of individual signals; and a second Bragg interleaver configured to receive the second interleaved signal and produce a third output signal including a third individual signal of the plurality of individual signals and a fourth output signal including a fourth individual signal of the plurality of individual signals.

    DOUBLE BONDING WHEN FRABRICATING AN OPTICAL DEVICE

    公开(公告)号:US20230015671A1

    公开(公告)日:2023-01-19

    申请号:US17305986

    申请日:2021-07-19

    Abstract: Embodiments herein describe using a double wafer bonding process to form a photonic device. In one embodiment, during the bonding process, an optical element (e.g., a high precision optical element) is optically coupled to an optical device in an active surface layer. In one example, the optical element comprises a nitride layer which can be patterned to form a nitride waveguide, passive optical multiplexer or demultiplexer, or an optical coupler.

    PROCESS MARGIN RELAXATION
    27.
    发明申请

    公开(公告)号:US20210345022A1

    公开(公告)日:2021-11-04

    申请号:US17305287

    申请日:2021-07-02

    Abstract: Process margin relaxation is provided in relation to a compensated-for process via a first optical device, fabricated to satisfy an operational specification when a compensated-for process is within a first tolerance range; a second optical device, fabricated to satisfy the operational specification when the compensated-for process is within second tolerance range, different than the first tolerance range; a first optical switch connected to an input and configured to output an optical signal received from the input to one of the first optical device and the second optical device; and a second optical switch configured to combine outputs from the first optical device and the second optical device.

    SILICON PHOTONICS PLATFORM WITH INTEGRATED OXIDE TRENCH EDGE COUPLER STRUCTURE

    公开(公告)号:US20210311255A1

    公开(公告)日:2021-10-07

    申请号:US17304227

    申请日:2021-06-16

    Abstract: A method includes defining a first waveguide in a first region of an optical device over a first dielectric layer over a silicon on insulator (SOI) substrate of the optical device and disposing a second dielectric layer on the first waveguide and the first dielectric layer of the optical device. The method also includes defining a second region on the second dielectric layer, the first dielectric layer, and the SOI substrate. The second region includes an integrated trench structure defined in the SOI substrate. The method further includes etching the second region to form an etched second region, disposing a third dielectric layer in the etched second region, and disposing a second waveguide on at least the third dielectric layer. The second waveguide is disposed to provide an optical coupling between the second waveguide and the first waveguide.

    MULTIPLE STAGE BRAGG GRATINGS IN MULTIPLEXING APPLICATIONS

    公开(公告)号:US20210109281A1

    公开(公告)日:2021-04-15

    申请号:US17107298

    申请日:2020-11-30

    Abstract: Aspects described herein include an optical apparatus comprising a multiple-stage arrangement of two-mode Bragg gratings comprising: at least a first Bragg grating of a first stage. The first Bragg grating is configured to transmit a first two wavelengths and to reflect a second two wavelengths of a received optical signal. The optical apparatus further comprises a second Bragg grating of a second stage. The second Bragg grating is configured to transmit one of the first two wavelengths and to reflect an other of the first two wavelengths. The optical apparatus further comprises a third Bragg grating of the second stage. The third Bragg grating is configured to transmit one of the second two wavelengths and to reflect an other of the second two wavelengths.

Patent Agency Ranking