-
21.发明申请公开(公告)号：US20180359045A1
公开(公告)日：2018-12-13
申请号：US15780043
申请日：2016-12-30
Inventor： Sung-Ik PARK , Sun-Hyoung KWON , Jae-Young LEE , Heung-Mook KIM , Nam-Ho HUR
IPC: H04J13/10 , H04L1/00 , H04L27/26 , H04B1/7073
CPC classification number: H04J13/10 , H04B1/7073 , H04L1/0041 , H04L1/0071 , H04L27/2605
Abstract: An apparatus for transmitting broadcasting signal using transmitter identification and method using the same are disclosed. An apparatus for transmitting broadcasting signal according to an embodiment of the present invention includes a waveform generator configured to generate a host broadcasting signal; a transmitter identification signal generator configured to generate a transmitter identification signal for identifying a transmitter; and a combiner configured to inject the transmitter identification signal into the host broadcasting signal in a time domain so that the transmitter identification signal is transmitted synchronously with the host broadcasting signal.
-
公开(公告)号：US20180063559A1
公开(公告)日：2018-03-01
申请号：US15660741
申请日：2017-07-26
Inventor： Tae-Kyoon KIM , Yong-Seong CHO , Joon-Young JUNG , Nam-Ho HUR
IPC: H04N21/2385 , H04N21/472 , H04N21/6405 , H04N21/61
CPC classification number: H04N21/2385 , H04N21/2393 , H04N21/266 , H04N21/472 , H04N21/6118 , H04N21/6168 , H04N21/6405 , H04N21/6581
Abstract: Disclosed herein is technology for controlling transmission of a switched digital video service through which an operator management and control system for efficiently managing and controlling a switched digital video transmission system, which may improve utilization of frequency resources, may be simply constructed and managed. To this end, a method for controlling transmission of a switched digital video service includes configuring a multicast session based on information about a request to transmit a video, which is transmitted from a user end; forming and controlling a service flow to be transmitted through the multicast session; allocating and managing a frequency channel resource through which the service flow is to be transmitted; and sharing information about the frequency channel resource and allocation thereof with a switched digital video control module and managing and controlling the switched digital video control module.
-
23.发明申请公开(公告)号：US20180034591A1
公开(公告)日：2018-02-01
申请号：US15421295
申请日：2017-01-31
Inventor： Joung-Il YUN , Sang-Woon KWAK , Myung-Sun BAEK , Hae-Chan KWON , Hyoung-Soo LIM , Nam-Ho HUR , Nam-Shik KIM , Bi-Woong CHUNG
CPC classification number: H04L27/01 , H04B1/71072 , H04L1/005 , H04L1/0054 , H04L25/03006 , H04L25/03834 , H04L25/068
Abstract: Disclosed herein are an apparatus and method for receiving a signal based on FTN. The apparatus for receiving a signal based on FTN includes an equalizer for creating a Log Likelihood Ratio (LLR) sequence by equalizing an FTN signal sequence sampled at an FTN signaling rate; a deinterleaver for deinterleaving the created LLR sequence; a decoder for decoding the LLR sequence by correcting errors in the deinterleaved LLR sequence; an interleaver for interleaving the decoded LLR sequence and providing the interleaved LLR sequence to the equalizer; and an FTN interference estimation unit for providing the FTN signal sequence, from which an FTN interference sequence is eliminated, to the equalizer, using the interleaved LLR sequence.
-
24.发明申请公开(公告)号：US20170374421A1
公开(公告)日：2017-12-28
申请号：US15599390
申请日：2017-05-18
Inventor： Hyun-Jeong YIM , Soon-Choul KIM , Byung-Jun BAE , Hye-Ju OH , Heung-Mook KIM , Hyoung-Soo LIM , Nam-Ho HUR
IPC: H04N21/462 , H04N21/438 , H04N21/435 , H04N21/434 , H04N21/2665 , H04N21/61 , H04N21/2362
CPC classification number: H04N21/4622 , H04N21/21805 , H04N21/2187 , H04N21/2362 , H04N21/26233 , H04N21/2665 , H04N21/2668 , H04N21/4345 , H04N21/435 , H04N21/6587 , H04N21/816
Abstract: Disclosed are a dynamic multi-mode service (MMS) transmission apparatus, a dynamic MMS reception apparatus, and a method for providing a dynamic MMS. The method includes generating, by the dynamic MMS transmission apparatus, signaling information including information about linkage between service channels based on broadcast schedule information about a broadcast service; transmitting, by the dynamic MMS transmission apparatus, the signaling information and the broadcast service to the dynamic MMS reception apparatus through at least one of a broadcast network and a broadband network; receiving, by the dynamic MMS reception apparatus, the signaling information and the broadcast service; interpreting, by the dynamic MMS reception apparatus, the information about the linkage between service channels, included in the signaling information, by decoding the signaling information; and providing, by the dynamic MMS reception apparatus, the broadcast service by performing dynamic channel switching based on the information about the linkage between service channels.
-
公开(公告)号：US20170187394A1
公开(公告)日：2017-06-29
申请号：US15423539
申请日：2017-02-02
Inventor： Sung-Ik PARK , Sun-Hyoung KWON , Jae-Young LEE , Heung-Mook KIM , Nam-Ho HUR
CPC classification number: H03M13/2792 , H03M13/1148 , H03M13/116 , H03M13/1185 , H03M13/255 , H03M13/2778 , H04L1/0041 , H04L1/0045 , H04L1/0058 , H04L1/0071
Abstract: A bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 5/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 64-symbol mapping.
-
Patent Agency Ranking
公开(公告)号：US20170149455A1
公开(公告)日：2017-05-25
申请号：US15425734
申请日：2017-02-06
Inventor： Sung-Ik PARK , Sun-Hyoung KWON , Bo-Mi LIM , Jae-Young LEE , Heung-Mook KIM , Nam-Ho HUR
CPC classification number: H03M13/2792 , G06F11/1076 , H03M13/1102 , H03M13/1148 , H03M13/116 , H03M13/1185 , H03M13/255 , H03M13/2778 , H03M13/616 , H03M13/6552 , H04L1/0041 , H04L1/0045 , H04L1/0058 , H04L1/0071
Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 16200 and a code rate of 4/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 16-symbol mapping.
-
公开(公告)号：US20170149453A1
公开(公告)日：2017-05-25
申请号：US15423496
申请日：2017-02-02
Inventor： Sung-Ik PARK , Sun-Hyoung KWON , Jae-Young LEE , Heung-Mook KIM , Nam-Ho HUR
CPC classification number: H03M13/2792 , H03M13/036 , H03M13/1148 , H03M13/116 , H03M13/1165 , H03M13/255 , H03M13/616 , H04L1/0041 , H04L1/0045 , H04L1/0058 , H04L1/0071
Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 3/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 16-symbol mapping.
-
公开(公告)号：US20170117923A1
公开(公告)日：2017-04-27
申请号：US15402107
申请日：2017-01-09
Inventor： Sung-Ik PARK , Sun-Hyoung KWON , Jae-Young LEE , Heung-Mook KIM , Nam-Ho HUR
CPC classification number: H03M13/2792 , H03M13/1102 , H03M13/116 , H03M13/1185 , H03M13/255 , H03M13/2757 , H03M13/2778 , H03M13/616 , H03M13/6552 , H04L1/0041 , H04L1/0057 , H04L1/0058 , H04L1/0071 , H04L27/20 , H04L27/3416
Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 7/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for quadrature phase shift keying (QPSK) modulation.
-
29.发明申请LOW DENSITY PARITY CHECK ENCODER HAVING LENGTH OF 64800 AND CODE RATE OF 2/15, AND LOW DENSITY PARITY CHECK ENCODING METHOD USING THE SAME 审中-公开低密度奇偶校验编码器的长度为64800，编码速率为2/15，低密度奇偶校验编码方法使用该编码方法公开(公告)号：US20170012645A1
公开(公告)日：2017-01-12
申请号：US15271169
申请日：2016-09-20
Inventor： Sung-Ik PARK , Heung-Mook KIM , Sun-Hyoung KWON , Nam-Ho HUR
CPC classification number: H03M13/1177 , H03M13/1102 , H03M13/1105 , H03M13/116 , H03M13/1165 , H03M13/1185 , H03M13/255 , H03M13/616 , H03M13/6552 , H04L1/0057
Abstract: A low density parity check (LDPC) encoder, an LDPC decoder, and an LDPC encoding method are disclosed. The LDPC encoder includes first memory, second memory, and a processor. The first memory stores an LDPC codeword having a length of 64800 and a code rate of 2/15. The second memory is initialized to 0. The processor generates the LDPC codeword corresponding to information bits by performing accumulation with respect to the second memory using a sequence corresponding to a parity check matrix (PCM).
Abstract translation: 公开了一种低密度奇偶校验（LDPC）编码器，LDPC解码器和LDPC编码方法。 LDPC编码器包括第一存储器，第二存储器和处理器。 第一存储器存储长度为64800，码率为2/15的LDPC码字。 第二存储器被初始化为0.处理器通过使用与奇偶校验矩阵（PCM）相对应的序列执行相对于第二存储器的累积来生成与信息位对应的LDPC码字。
-
30.发明申请BIT INTERLEAVER FOR LOW-DENSITY PARITY CHECK CODEWORD HAVING LENGTH OF 16200 AND CODE RATE OF 4/15 AND 64-SYMBOL MAPPING, AND BIT INTERLEAVING METHOD USING SAME 有权用于低密度奇偶校验的位交换机检查长度为16200，编码速率为4/15和64符号映射，以及使用相同的位交互方法公开(公告)号：US20160241271A1
公开(公告)日：2016-08-18
申请号：US14719254
申请日：2015-05-21
Inventor： Sung-Ik PARK , Sun-Hyoung KWON , Bo-Mi LIM , Jae-Young LEE , Heung-Mook KIM , Nam-Ho HUR
CPC classification number: H03M13/2767 , H03M13/1105 , H04L1/0041 , H04L1/0071
Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 16200 and a code rate of 4/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 64-symbol mapping.
Abstract translation: 本文公开了一种位交织器，位交织编码调制（BICM）装置和比特交织方法。 比特交织器包括第一存储器，处理器和第二存储器。 第一存储器存储长度为16200且码率为4/15的低密度奇偶校验（LDPC）码字。 处理器通过基于比特组交织LDPC码字来产生交错码字。 位组的大小对应于LDPC码字的并行因子。 第二存储器将交织的码字提供给用于64符号映射的调制器。
-
-
-
-
-
-
-
-
-
Search Results
214
records
(took 0.032 seconds)
