公开(公告)号：US20170062442A1

公开(公告)日：2017-03-02

申请号：US14842345

申请日：2015-09-01

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Suraj K. PATIL ,  Ajey P. JACOB ,  Min-hwa CHI

IPC: H01L27/112

CPC classification number: H01L27/11206 ,  G11C13/0002 ,  G11C13/0009 ,  G11C13/0069 ,  G11C13/025 ,  G11C2013/008 ,  H01L23/5256 ,  H01L23/53276 ,  H01L27/112 ,  H01L29/0676 ,  H01L29/413

Abstract: Methods and structures for programmable device fabrication are provided. The methods for fabricating a programmable device include, for example forming at least one via opening in a layer of the programmable device and providing a catalyzing material over a lower surface of the at least one via opening; forming a plurality of nanowires or nanotubes in the at least one via opening using the catalyzing material as a catalyst for the forming of the plurality of nanowires or nanotubes; and providing a dielectric material in the at least one via opening so that the dielectric material surrounds the plurality of nanowires or nanotubes. The programmable device may, in subsequent or separate programming steps, have programming of the programmable device made permanent via thermal oxidation of the dielectric material and the plurality of nanowires or nanotubes, leaving a non-conducting material behind in the at least one via opening.

Abstract translation: 提供了可编程器件制造的方法和结构。 制造可编程装置的方法包括例如在可编程装置的层中形成至少一个通孔，并在至少一个通孔开口的下表面上提供催化材料; 在所述至少一个通孔开口中使用所述催化材料形成多个纳米线或纳米管作为用于形成所述多个纳米线或纳米管的催化剂; 以及在所述至少一个通孔开口中提供介电材料，使得所述电介质材料包围所述多个纳米线或纳米管。 可编程设备在随后或单独的编程步骤中可以通过介电材料和多个纳米线或纳米管的热氧化使可编程器件的编程永久化，在至少一个通孔开口之后留下非导电材料。

公开(公告)号：US20150021709A1

公开(公告)日：2015-01-22

申请号：US13945379

申请日：2013-07-18

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Ajey P. JACOB ,  Murat Kerem AKARVARDAR ,  Michael John HARGROVE

IPC: H01L27/12 ,  H01L21/8234 ,  H01L29/06 ,  H01L21/762

CPC classification number: H01L27/1211 ,  H01L21/76229 ,  H01L21/76281 ,  H01L21/823431 ,  H01L21/823481 ,  H01L27/1207 ,  H01L29/0649 ,  H01L29/7848

Abstract: Semiconductor structures and fabrication methods are provided integrating different fin device architectures on a common wafer, for instance, within a common functional device area of the wafer. The method includes: facilitating fabricating multiple fin device architectures within a common functional device wafer area by: providing a wafer with at least one fin disposed over a substrate, the fin including an isolation layer; modifying the fin(s) in a first region of the fin(s), while protecting the fin in a second region of the fin(s); and proceeding with forming one or more fin devices of a first architectural type in the first region and one or more fin devices of a second architectural type in the second region. The first architectural type and the second architectural type are different fin device architectures, such as different fin device isolation architectures, different fin type transistor architectures, or different fin-type devices or structures.

Abstract translation: 提供半导体结构和制造方法，其在公共晶片上集成了不同的鳍式器件结构，例如在晶片的公共功能器件区域内。 该方法包括：通过以下方式促进在公共功能器件晶片区域内制造多个鳍器件结构：提供具有设置在衬底上的至少一个鳍的晶片，所述鳍包括隔离层; 在翅片的第一区域中修改翅片，同时保护翅片的第二区域中的翅片; 并且继续在第一区域中形成第一建筑类型的一个或多个翅片装置和在第二区域中形成第二建筑类型的一个或多个翅片装置。 第一种架构类型和第二种结构类型是不同的鳍式器件架构，例如不同的鳍式器件隔离架构，不同鳍型晶体管架构，或不同鳍型器件或结构。