CMP HEAD STRUCTURE
    21.
    发明申请

    公开(公告)号:US20160136781A1

    公开(公告)日:2016-05-19

    申请号:US15005029

    申请日:2016-01-25

    CPC classification number: B24B49/00 B24B37/005 B24B37/32

    Abstract: A CMP structure for CMP processing and a method of making a device using the same are presented. The apparatus comprises a polishing pad on a platen table; a head assembly for holding a wafer against the polishing pad, wherein the head assembly includes the retaining ring; a sensor for sensing the step height between the retaining ring and its membrane and a controller for adjusting the movement of the retaining ring based on the step height between the retaining ring and its membrane to ensure the step height remains at a fixed value as the retaining ring wears out.

    Through silicon vias
    22.
    发明授权
    Through silicon vias 有权
    通过硅通孔

    公开(公告)号:US09287197B2

    公开(公告)日:2016-03-15

    申请号:US13831898

    申请日:2013-03-15

    Abstract: A device and methods for forming a device are disclosed. A substrate is provided and a TSV is formed in the substrate through a top surface of the substrate. The TSV and top surface of the substrate is lined with an insulation stack having a first insulation layer, a polish stop layer and a second insulation layer. A conductive layer is formed on the substrate. The TSV is filled with conductive material of the conductive layer. The substrate is planarized to remove excess conductive material of the conductive layer. The planarizing stops on the polish stop layer to form a planar top surface.

    Abstract translation: 公开了一种用于形成装置的装置和方法。 提供衬底,并且通过衬底的顶表面在衬底中形成TSV。 衬底的TSV和顶表面衬有具有第一绝缘层,抛光停止层和第二绝缘层的绝缘堆叠。 在基板上形成导电层。 TSV填充有导电层的导电材料。 将衬底平坦化以除去导电层的过量导电材料。 平坦化停止在抛光停止层上以形成平坦的顶表面。

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