公开(公告)号：US10984860B2

公开(公告)日：2021-04-20

申请号：US16364717

申请日：2019-03-26

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Amit S. Sharma ,  John Paul Strachan ,  Catherine Graves ,  Suhas Kumar ,  Craig Warner ,  Martin Foltin

IPC: G11C13/00 ,  G06F11/10 ,  G06N3/04 ,  G11C29/52

Abstract: A DPE memristor crossbar array system includes a plurality of partitioned memristor crossbar arrays. Each of the plurality of partitioned memristor crossbar arrays includes a primary memristor crossbar array and a redundant memristor crossbar array. The redundant memristor crossbar array includes values that are mathematically related to values within the primary memristor crossbar array. In addition, the plurality of partitioned memristor crossbar arrays includes a block of shared analog circuits coupled to the plurality of partitioned memristor crossbar arrays. The block of shared analog circuits is to determine a dot product value of voltage values generated by at least one partitioned memristor crossbar array of the plurality of partitioned memristor crossbar arrays.

公开(公告)号：US20210103802A1

公开(公告)日：2021-04-08

申请号：US16593391

申请日：2019-10-04

Applicant: Hewlett Packard Enterprise Development LP

Inventor： Suhas Kumar ,  John Paul Strachan

IPC: G06N3/063 ,  G11C13/00 ,  G11C11/54 ,  G06N3/04

Abstract: Examples disclosed herein relate to a memristor matrix comprising a crossbar array, a multiplexer and a noise control circuit. The noise control circuit may comprise a threshold comparator and a threshold feedback circuit to receive a first threshold and a second threshold and output a threshold signal based, in part, on an output of the threshold comparator.

公开(公告)号：US10949738B1

公开(公告)日：2021-03-16

申请号：US16593391

申请日：2019-10-04

Applicant: Hewlett Packard Enterprise Development LP

Inventor： Suhas Kumar ,  John Paul Strachan

IPC: G11C11/00 ,  G06N3/063 ,  G11C13/00 ,  G06N3/04 ,  G11C11/54

Abstract: A memristor matrix comprising a crossbar array, a multiplexer and a noise control circuit. The noise control circuit may comprise a threshold comparator and a threshold feedback circuit to receive a first threshold and a second threshold and output a threshold signal based, in part, on an output of the threshold comparator.

公开(公告)号：US10930343B2

公开(公告)日：2021-02-23

申请号：US16107063

申请日：2018-08-21

Applicant: Hewlett Packard Enterprise Development LP

Inventor： Amit S. Sharma ,  Suhas Kumar ,  Xia Sheng

IPC: G11C13/00 ,  H01L45/00 ,  H01L27/24 ,  G11C8/14

Abstract: A memristor device includes a first electrode, a second electrode, and a memristor layer disposed between the first electrode and the second electrode. The memristor layer is formed of a metal oxide. The memristor layer includes a plurality of regions that extend between the first electrode and the second electrode. The plurality of regions of the memristor layer are created with different concentrations of oxygen before electrical operation, and, during electrical operation, a voltage-conductance characteristic of the memristor device is controlled based on the different concentrations of oxygen of the plurality of regions. The controlling of the voltage-conductance characteristic includes increasing or decreasing the conductance of the memristor device toward a target conductance at a specific voltage.

公开(公告)号：US20200334523A1

公开(公告)日：2020-10-22

申请号：US16386849

申请日：2019-04-17

Applicant: Hewlett Packard Enterprise Development LP

Inventor： Suhas Kumar ,  Thomas Van Vaerenbergh ,  John Paul Strachan

IPC: G06N3/063 ,  H03K3/0233 ,  G11C13/00 ,  G06N3/04

Abstract: Systems and methods are provided for implementing a hardware accelerator. The hardware accelerator emulates a neural network, and includes a memristor crossbar array, and a non-linear filter. The memristor crossbar array can be programmed to calculate node values of the neural network. The nodes values can be calculated in accordance with rules to reduce an energy function associated with the neural network. The non-linear filter is coupled to the memristor crossbar array and programmed to harness noise signals that may be present in analog circuitry of the hardware accelerator. The noise signals can be harnessed such that the energy function associated with the neural network converges towards a global minimum and modifies the calculated node values. In some embodiments, the non-liner filter is implemented as a Schmidt trigger comparator.

公开(公告)号：US10700638B2

公开(公告)日：2020-06-30

申请号：US15657996

申请日：2017-07-24

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Suhas Kumar

IPC: H03B7/06 ,  H03B5/04 ,  H03K19/20 ,  H04L27/00

Abstract: An oscillator circuit that includes a voltage source, a resistor, a capacitor, and a nonlinear device. The capacitor and the nonlinear device may be coupled in parallel with one another. The resistor may be coupled in series with the capacitor and the nonlinear device. The voltage source may be coupled in series with the resistor. The voltage source may supply the oscillator circuit with a direct current input signal. The nonlinear device may include an active layer coupled to a first electrode and a second electrode. In response to the direct current input signal, the oscillator circuit may output a spike train including a spike bunch.

公开(公告)号：US20200066340A1

公开(公告)日：2020-02-27

申请号：US16107063

申请日：2018-08-21

Applicant: Hewlett Packard Enterprise Development LP

Inventor： Amit S. Sharma ,  Suhas Kumar ,  Xia Sheng

IPC: G11C13/00 ,  H01L27/24 ,  H01L45/00 ,  G11C8/14

Abstract: A memristor device includes a first electrode, a second electrode, and a memristor layer disposed between the first electrode and the second electrode. The memristor layer is formed of a metal oxide. The memristor layer includes a plurality of regions that extend between the first electrode and the second electrode. The plurality of regions of the memristor layer are created with different concentrations of oxygen before electrical operation, and, during electrical operation, a voltage-conductance characteristic of the memristor device is controlled based on the different concentrations of oxygen of the plurality of regions. The controlling of the voltage-conductance characteristic includes increasing or decreasing the conductance of the memristor device toward a target conductance at a specific voltage.

公开(公告)号：US20190034789A1

公开(公告)日：2019-01-31

申请号：US15664058

申请日：2017-07-31

Applicant: Hewlett Packard Enterprise Development LP

Inventor： Suhas Kumar

IPC: G06N3/063

Abstract: A non-Boolean analog system includes a first Mott memristor having a first value of a characteristic, and a second Mott memristor having a second value of the characteristic different than the first value. The system includes a resistance in series with the first and second Mott memristors to form a network having a capacitance and that is operable as a relaxation oscillator. Responsive to electrical excitation, a temperature of the network operating an environment including ambient thermal noise settles at an equilibrium corresponding to a global minimum that is a maximally optimal global solution to a global optimization problem to which the network corresponds.

公开(公告)号：US20170317646A1

公开(公告)日：2017-11-02

申请号：US15141410

申请日：2016-04-28

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Suhas Kumar ,  John Paul Strachan ,  Gary Gibson ,  R. Stanley Williams

IPC: H03B7/06

CPC classification number: H03B7/06 ,  H03B5/04 ,  H03K19/20

Abstract: In some examples, a device includes a nano-scale oscillator that exhibits chaotic oscillation responsive to a control input to the nano-scale oscillator, where the control input including a tunable input parameter.