公开(公告)号：US20070250556A1

公开(公告)日：2007-10-25

申请号：US11711479

申请日：2007-02-26

Applicant: Hakan Ozdemir ,  Jonathan Ashley

Inventor： Hakan Ozdemir ,  Jonathan Ashley

IPC: G06F17/17

CPC classification number: G11B20/10009 ,  G11B20/10027 ,  G11B20/10046 ,  G11B20/10222 ,  G11B20/10296 ,  G11B20/10481 ,  G11B20/1876

Abstract: An embodiment of a read channel includes a filter, an interpolator, a recovery circuit, an error detector, a reverse interpolator, and a filter calibrator. The filter is operable to receive a raw sample of a signal and a coefficient-correction value, generate a filtered sample from the raw sample and a pre-established coefficient, and change the coefficient in response to the coefficient-correction value. The interpolator is operable to interpolate the filtered sample, and the recovery circuit is operable to generate a data symbol from the interpolated sample. The error detector is operable to generate an ideal sample from the data symbol and to generate a difference between the ideal sample and the interpolated sample, and the reverse interpolator is operable to reverse interpolate the difference. The filter calibrator is operable to receive the raw sample and to generate the coefficient-correction value from the raw sample and the reverse-interpolated difference.

Abstract translation: 读通道的实施例包括滤波器，内插器，恢复电路，误差检测器，反向内插器和滤波器校准器。 滤波器可操作以接收信号的原始样本和系数校正值，从原始样本生成滤波后的样本和预先建立的系数，并响应于系数校正值改变系数。 内插器可操作地内插经滤波的样本，并且恢复电路可操作以从内插样本生成数据符号。 误差检测器可操作以从数据符号产生理想的采样，并产生理想采样与内插采样之间的差值，并且反向内插器可操作以反向内插差值。 过滤器校准器可操作以接收原始样品并从原始样品和反向插值差产生系数校正值。

公开(公告)号：US20060256464A1

公开(公告)日：2006-11-16

申请号：US11402165

申请日：2006-04-10

Applicant: Hakan Ozdemir

Inventor： Hakan Ozdemir

IPC: G11B5/09 ,  G11B5/035

CPC classification number: G11B20/10009 ,  G11B5/09 ,  G11B20/1403

Abstract: A phase-acquisition (PA) loop for a read channel comprises an accumulator, a comparator, and a filter. The accumulator holds an acquired phase-correction value corresponding to a difference between a phase of a sample clock and a phase of data carried by a read signal, and provides the acquired phase-correction value to a circuit that modifies the read signal to compensate for the phase difference. The comparator receives a reference phase-correction value that also corresponds to the difference between the phases of the sample clock and the data, and generates an error signal that is related to a difference between the reference and acquired phase-correction values. And the filter causes the acquired phase-correction value to have a predetermined relationship to the reference phase-correction value. Because such a PA loop may require significantly fewer samples of a read-signal preamble than prior PA loops requires to acquire the phase between a sample clock and data carried by a read signal, such a PA loop may allow one to significantly reduce the length of the preamble.

Abstract translation: 用于读通道的相位采集（PA）回路包括累加器，比较器和滤波器。 累加器保持对应于采样时钟的相位与由读取信号携带的数据的相位之间的差的获取的相位校正值，并将所获取的相位校正值提供给修改读取信号以补偿 相位差。 比较器接收也对应于采样时钟和数据的相位之间的差的参考相位校正值，并且产生与参考和获取的相位校正值之间的差有关的误差信号。 并且滤波器使获取的相位校正值与参考相位校正值具有预定的关系。 因为这样的PA环路可能需要比现有PA环路要求获取采样时钟和读取信号携带的数据之间的相位更少的读信号前导码的采样，所以这样的PA环路可以允许一个PA环路的长度 序言。

公开(公告)号：US20060256463A1

公开(公告)日：2006-11-16

申请号：US11402155

申请日：2006-04-10

Applicant: Hakan Ozdemir

Inventor： Hakan Ozdemir

IPC: G11B5/09 ,  G11B5/02

CPC classification number: G11B5/09 ,  G11B20/10009

Abstract: A gain controller for a gain loop of a read channel includes a comparator circuit, an accumulator circuit, and a function circuit. The comparator circuit determines an error between an actual sample of a read signal and a corresponding ideal sample of the read signal, and the accumulator circuit holds a gain-correction value and adjusts the gain-correction value in response to the error. The function circuit generates a gain-correction signal by performing a predetermined mathematical operation involving the gain-correction value, and provides the gain-correction signal to a variable-gain amplifier that is operable to amplify actual samples of the read signal. Because such a gain controller allows one to locate the variable-gain amplifier (VGA) after the analog-to-digital converter (ADC) in a read channel, the gain controller may significantly reduce the latency of the gain-acquisition (GA) loop or the gain-tracking (GT) loop of the read channel. The gain controller may also allow the GA loop and the GT loop to be completely contained with in the digital portion of the read channel.

Abstract translation: 用于读通道的增益环的增益控制器包括比较器电路，累加器电路和功能电路。 比较器电路确定读取信号的实际样本与读取信号的对应理想采样之间的误差，并且累加器电路保持增益校正值并响应于该误差调整增益校正值。 功能电路通过执行涉及增益校正值的预定数学运算来生成增益校正信号，并将增益校正信号提供给可操作以放大读取信号的实际采样的可变增益放大器。 因为这样的增益控制器允许在读通道中的模数转换器（ADC）之后定位可变增益放大器（VGA），所以增益控制器可以显着降低增益采集（GA）回路的延迟 或读通道的增益跟踪（GT）循环。 增益控制器还可以允许GA循环和GT循环在读取通道的数字部分中被完全包含。

公开(公告)号：US07036070B1

公开(公告)日：2006-04-25

申请号：US10246952

申请日：2002-09-19

Applicant: Hakan Ozdemir

Inventor： Hakan Ozdemir

IPC: G06F11/00

CPC classification number: H04L25/03866 ,  H04L1/203

Abstract: An error monitoring system for a transceivers includes a multiplexer and a parity calculating circuit. A comparator has a first input that is coupled to the multiplexer and a second input that is coupled to the parity calculating circuit.

Abstract translation: 用于收发器的误差监测系统包括多路复用器和奇偶校验计算电路。 比较器具有耦合到多路复用器的第一输入端和耦合到奇偶运算电路的第二输入端。

公开(公告)号：US06366225B1

公开(公告)日：2002-04-02

申请号：US09503929

申请日：2000-02-14

Applicant: Hakan Ozdemir

Inventor： Hakan Ozdemir

IPC: H03M148

CPC classification number: H04L7/0054 ,  G11B20/10009 ,  G11B20/10037 ,  G11B20/10296 ,  G11B20/1403 ,  H03L7/091 ,  H04L7/0029 ,  H04L2007/047

Abstract: A phase-calculation circuit includes a buffer, an approximation circuit, and an interpolator. The buffer receives and stores first and second samples of a periodic signal having a peak amplitude. The approximation circuit linearly approximates a portion of the periodic signal, and calculates the relative phase of one of the samples within the signal portion. The interpolator then calculates the absolute phase of the one sample with respect to a predetermined point of the signal using the relative phase of the sample within the signal portion and the values of the first and second samples. Such a circuit can be used to decrease the alignment-acquisition time of a digital timing-recovery loop, and thus allows a shortening of the preamble and a corresponding increase in the data-storage density of a disk. In one application, the circuit determines an initial phase difference between a disk-drive read signal and a read-signal sample clock. The digital timing-recovery circuit uses this phase difference to provide an initial coarse alignment between the read signal and the sample clock. By providing an initial coarse alignment, the recovery circuit reduces the overall alignment-acquisition time.

Abstract translation: 相位计算电路包括缓冲器，近似电路和内插器。 缓冲器接收并存储具有峰值幅度的周期信号的第一和第二采样。 近似电路线性地近似周期信号的一部分，并且计算信号部分内的样本之一的相对相位。 插值器然后使用信号部分内的样本的相对相位和第一和第二样本的值来计算相对于信号的预定点的一个样本的绝对相位。 可以使用这样的电路来减小数字定时恢复环路的对准采集时间，从而可以缩短前导码，并减少磁盘的数据存储密度的相应增加。 在一个应用中，电路确定盘驱动器读取信号和读取信号采样时钟之间的初始相位差。 数字定时恢复电路使用该相位差来提供读取信号和采样时钟之间的初始粗略对准。 通过提供初始粗略对准，恢复电路降低了整体对准采集时间。