公开(公告)号：US07206149B2

公开(公告)日：2007-04-17

申请号：US09993869

申请日：2001-11-05

申请人： Hakan Ozdemir

发明人： Hakan Ozdemir

IPC分类号： G11B5/09

CPC分类号： G11B5/59633 ,  G11B19/20 ,  G11B19/28

摘要： A servo circuit includes a servo channel and a processor. The servo channel recovers servo data from servo wedges that identify respective data sectors on a data-storage disk. On spin up of the disk, the processor detects a spin-up wedge associated with one of the servo wedges and then detects the servo wedge. Once the servo wedge is detected, a head-position circuit can read the location data from the servo wedge to determine an initial position of the read-write head. By detecting a both a spin-up wedge and a servo wedge to determine an initial head position on disk spin up, such a servo circuit often allows one to increase the disk's storage capacity by reducing the lengths of the spin-up wedges.

摘要翻译： 伺服电路包括伺服通道和处理器。 伺服通道从数据存储盘上识别相应数据扇区的伺服楔恢复伺服数据。 在盘旋转时，处理器检测与其中一个伺服楔形件相关的升降楔，然后检测伺服楔。 一旦检测到伺服楔，则头位置电路可以从伺服楔读取位置数据，以确定读写头的初始位置。 通过检测旋转楔和伺服楔两者以确定磁盘上升时的初始磁头位置，这样的伺服电路通常允许通过减小旋转楔的长度来增加磁盘的存储容量。

公开(公告)号：US06867941B1

公开(公告)日：2005-03-15

申请号：US09503949

申请日：2000-02-14

申请人： Hakan Ozdemir

发明人： Hakan Ozdemir

IPC分类号： G11B5/012 ,  G11B20/10 ,  H03G3/20 ,  H03M1/18 ,  G11B5/03

CPC分类号： G11B20/10027 ,  G11B5/012 ,  G11B20/10009 ,  G11B20/10037

摘要： A circuit controls the gain of an amplifier that amplifies an information signal. The circuit includes a buffer for storing first and second samples of the amplified information signal, and a gain-determination circuit coupled to the buffer. The gain-determination circuit generates a gain adjustment based on the sum of the first and second samples, the gain adjustment causing the amplifier to change the amplitude of the amplified information signal to or toward a predetermined amplitude. Such a circuit can provide an initial, coarse gain adjustment to a read-signal amplifier in a disk-drive read channel. Compared to prior read channels, this initial adjustment promotes faster settling of the amplifier gain at the beginning of a data sector. This faster settling allows the data sector to have a shorter preamble, and thus allows the disk to have a higher data-storage density. Furthermore, because the phase angle between the sample clock and the preamble sinusoid may be unknown at the beginning of the data sector, the circuit can determine the initial gain adjustment independent of this phase angle.

摘要翻译： 电路控制放大信号信号的放大器的增益。 电路包括用于存储放大的信息信号的第一和第二采样的缓冲器，以及耦合到缓冲器的增益确定电路。 增益确定电路基于第一和第二采样的总和产生增益调整，增益调整使得放大器将放大的信息信号的幅度改变为或朝向预定的幅度。 这样的电路可以在磁盘驱动器读取通道中为读取信号放大器提供初始的粗略增益调整。 与以前的读取通道相比，该初始调整可以促进在数据扇区开始时放大器增益的更快的建立。 这种更快的建立允许数据扇区具有较短的前导码，从而允许磁盘具有更高的数据存储密度。 此外，由于采样时钟与前导码正弦曲线之间的相位角在数据扇区的开始可能是未知的，所以电路可以独立于该相位角确定初始增益调整。

公开(公告)号：US07773324B2

公开(公告)日：2010-08-10

申请号：US11402165

申请日：2006-04-10

申请人： Hakan Ozdemir

发明人： Hakan Ozdemir

IPC分类号： G11B5/09

CPC分类号： G11B20/10009 ,  G11B5/09 ,  G11B20/1403

摘要： A phase-acquisition (PA) loop for a read channel comprises an accumulator, a comparator, and a filter. The accumulator holds an acquired phase-correction value corresponding to a difference between a phase of a sample clock and a phase of data carried by a read signal, and provides the acquired phase-correction value to a circuit that modifies the read signal to compensate for the phase difference. The comparator receives a reference phase-correction value that also corresponds to the difference between the phases of the sample clock and the data, and generates an error signal that is related to a difference between the reference and acquired phase-correction values. And the filter causes the acquired phase-correction value to have a predetermined relationship to the reference phase-correction value. Because such a PA loop may require significantly fewer samples of a read-signal preamble than prior PA loops requires to acquire the phase between a sample clock and data carried by a read signal, such a PA loop may allow one to significantly reduce the length of the preamble.

摘要翻译： 用于读通道的相位采集（PA）回路包括累加器，比较器和滤波器。 累加器保持对应于采样时钟的相位与由读取信号携带的数据的相位之间的差的获取的相位校正值，并将所获取的相位校正值提供给修改读取信号以补偿 相位差。 比较器接收也对应于采样时钟和数据的相位之间的差的参考相位校正值，并且产生与参考和获取的相位校正值之间的差有关的误差信号。 并且滤波器使获取的相位校正值与参考相位校正值具有预定的关系。 因为这样的PA环路可能需要比现有PA环路要求获取采样时钟和读取信号携带的数据之间的相位更少的读信号前导码的采样，所以这样的PA环路可以允许一个PA环路的长度 序言。

公开(公告)号：US20080270874A1

公开(公告)日：2008-10-30

申请号：US11903774

申请日：2007-09-24

申请人： Hakan Ozdemir

发明人： Hakan Ozdemir

IPC分类号： H03M13/23 ,  G06F11/08

CPC分类号： G11B20/10064 ,  G11B20/10009 ,  H03M13/3961 ,  H03M13/4107 ,  H03M13/6343 ,  H03M13/6502

摘要： An E2PR4 Viterbi detector includes a recovery circuit and receives a signal that represents a sequence of values, the sequence having a potential state. The recovery circuit recovers the sequence from the signal by identifying a surviving path to the potential state and, after identifying the surviving path, adding a modified branch metric to the path metric of the surviving path to generate an updated path metric for the potential state. Updating the path metric of the surviving path after the surviving path is selected allows the E2PR4 Viterbi detector to be smaller and/or faster than an E2PR4 Viterbi detector that updates the path metric before selecting the surviving path.

摘要翻译： PR2维特比检测器包括恢复电路并且接收表示值序列的信号，该序列具有潜在状态。 恢复电路通过识别到潜在状态的幸存路径来恢复序列，并且在识别存活路径之后，将修改的分支度量添加到幸存路径的路径度量以生成用于潜在状态的更新的路径度量。 在存活路径被选择后更新幸存路径的路径度量允许E 2 SUPER PR4维特比检测器比第2个PR4维特比检测器更小和/或更快， 在选择幸存路径之前更新路径度量。

公开(公告)号：US07382568B2

公开(公告)日：2008-06-03

申请号：US09993876

申请日：2001-11-05

申请人： Hakan Ozdemir

发明人： Hakan Ozdemir

IPC分类号： G11B5/595 ,  G11B15/18 ,  G11B5/09 ,  G11B5/02

CPC分类号： G11B5/59633 ,  G11B19/20 ,  G11B19/28

摘要： A servo circuit includes a servo channel and a processor. The servo channel recovers servo data from servo wedges that identify respective data sectors on a data-storage disk. The processor detects one of the servo wedges on spin up of the disk, i.e., while the disk is attaining or after the disk attains an operating speed. By detecting a servo wedge instead of a spin-up wedge to determine an initial head position on disk spin up, such a servo circuit allows one to increase the disk's storage capacity by reducing the number of, or altogether eliminating, spin-up servo wedges from the disk.

摘要翻译： 伺服电路包括伺服通道和处理器。 伺服通道从数据存储盘上识别相应数据扇区的伺服楔恢复伺服数据。 处理器检测到在盘旋转时的伺服楔形中的一个，即在盘达到或在盘达到操作速度之后。 通过检测伺服楔而不是旋转楔以确定磁盘上升的初始磁头位置，这样的伺服电路允许通过减少旋转伺服楔的数量或完全消除磁盘的存储容量来增加磁盘的存储容量 从磁盘。

公开(公告)号：US09171571B2

公开(公告)日：2015-10-27

申请号：US11711479

申请日：2007-02-26

申请人： Hakan Ozdemir ,  Jonathan James Ashley

发明人： Hakan Ozdemir ,  Jonathan James Ashley

IPC分类号： G11B20/10 ,  G11B20/18

CPC分类号： G11B20/10009 ,  G11B20/10027 ,  G11B20/10046 ,  G11B20/10222 ,  G11B20/10296 ,  G11B20/10481 ,  G11B20/1876

摘要： An embodiment of a read channel includes a filter, an interpolator, a recovery circuit, an error detector, a reverse interpolator, and a filter calibrator. The filter is operable to receive a raw sample of a signal and a coefficient-correction value, generate a filtered sample from the raw sample and a pre-established coefficient, and change the coefficient in response to the coefficient-correction value. The interpolator is operable to interpolate the filtered sample, and the recovery circuit is operable to generate a data symbol from the interpolated sample. The error detector is operable to generate an ideal sample from the data symbol and to generate a difference between the ideal sample and the interpolated sample, and the reverse interpolator is operable to reverse interpolate the difference. The filter calibrator is operable to receive the raw sample and to generate the coefficient-correction value from the raw sample and the reverse-interpolated difference.

摘要翻译： 读通道的实施例包括滤波器，内插器，恢复电路，误差检测器，反向内插器和滤波器校准器。 滤波器可操作以接收信号的原始样本和系数校正值，从原始样本生成滤波后的样本和预先建立的系数，并响应于系数校正值改变系数。 内插器可操作地内插经滤波的样本，并且恢复电路可操作以从内插样本生成数据符号。 误差检测器可操作以从数据符号产生理想的采样，并产生理想采样与内插采样之间的差值，并且反向内插器可操作以反向内插差值。 过滤器校准器可操作以接收原始样品并从原始样品和反向插值差产生系数校正值。

公开(公告)号：US08379340B2

公开(公告)日：2013-02-19

申请号：US12882917

申请日：2010-09-15

申请人： Hakan Ozdemir

发明人： Hakan Ozdemir

IPC分类号： G11B5/09

CPC分类号： H03M7/16 ,  G11B20/10009 ,  G11B20/10055 ,  G11B20/10175 ,  G11B20/10222 ,  G11B20/10296 ,  G11B20/1403 ,  G11B20/18 ,  G11B2020/1282 ,  G11B2020/1284 ,  G11B2020/1484 ,  G11B2020/1859 ,  G11B2020/1863 ,  H03M13/41 ,  H03M13/6343

摘要： A detector recovers servo data from a servo signal generated by a read-write head, and determines the head-connection polarity from the recovered servo data. Such a detector allows a servo circuit to compensate for a reversed-connected read-write head, and thus allows a manufacturer to forego time-consuming and costly testing to determine whether the head is correctly connected to the servo circuit.

公开(公告)号：US07768732B2

公开(公告)日：2010-08-03

申请号：US11402155

申请日：2006-04-10

申请人： Hakan Ozdemir

发明人： Hakan Ozdemir

IPC分类号： G11B5/035

CPC分类号： G11B5/09 ,  G11B20/10009

摘要： A gain controller for a gain loop of a read channel includes a comparator circuit, an accumulator circuit, and a function circuit. The comparator circuit determines an error between an actual sample of a read signal and a corresponding ideal sample of the read signal, and the accumulator circuit holds a gain-correction value and adjusts the gain-correction value in response to the error. The function circuit generates a gain-correction signal by performing a predetermined mathematical operation involving the gain-correction value, and provides the gain-correction signal to a variable-gain amplifier that is operable to amplify actual samples of the read signal. Because such a gain controller allows one to locate the variable-gain amplifier (VGA) after the analog-to-digital converter (ADC) in a read channel, the gain controller may significantly reduce the latency of the gain-acquisition (GA) loop or the gain-tracking (GT) loop of the read channel. The gain controller may also allow the GA loop and the GT loop to be completely contained with in the digital portion of the read channel.

摘要翻译： 用于读通道的增益环的增益控制器包括比较器电路，累加器电路和功能电路。 比较器电路确定读取信号的实际样本与读取信号的对应理想采样之间的误差，并且累加器电路保持增益校正值并响应于该误差调整增益校正值。 功能电路通过执行涉及增益校正值的预定数学运算来生成增益校正信号，并将增益校正信号提供给可操作以放大读取信号的实际采样的可变增益放大器。 因为这样的增益控制器允许在读通道中的模数转换器（ADC）之后定位可变增益放大器（VGA），所以增益控制器可以显着降低增益采集（GA）回路的延迟 或读通道的增益跟踪（GT）循环。 增益控制器还可以允许GA循环和GT循环在读取通道的数字部分中被完全包含。

公开(公告)号：US07290200B2

公开(公告)日：2007-10-30

申请号：US10194660

申请日：2002-07-12

申请人： Hakan Ozdemir

发明人： Hakan Ozdemir

IPC分类号： H03M13/03

CPC分类号： G11B20/10064 ,  G11B20/10009 ,  H03M13/3961 ,  H03M13/4107 ,  H03M13/6343 ,  H03M13/6502

摘要： An E2PR4 Viterbi detector includes a recovery circuit and receives a signal that represents a sequence of values, the sequence having a potential state. The recovery circuit recovers the sequence from the signal by identifying a surviving path to the potential state and, after identifying the surviving path, adding a modified branch metric to the path metric of the surviving path to generate an updated path metric for the potential state. Updating the path metric of the surviving path after the surviving path is selected allows the E2PR4 Viterbi detector to be smaller and/or faster than an E2PR4 Viterbi detector that updates the path metric before selecting the surviving path.

摘要翻译： PR2维特比检测器包括恢复电路并且接收表示值序列的信号，该序列具有潜在状态。 恢复电路通过识别到潜在状态的幸存路径来恢复序列，并且在识别存活路径之后，将修改的分支度量添加到幸存路径的路径度量以生成用于潜在状态的更新的路径度量。 在存活路径被选择后更新幸存路径的路径度量允许E 2 SUPER PR4维特比检测器比第2个PR4维特比检测器更小和/或更快， 在选择幸存路径之前更新路径度量。

公开(公告)号：US07027247B2

公开(公告)日：2006-04-11

申请号：US09993778

申请日：2001-11-05

申请人： Fereidoon Heydari ,  Hakan Ozdemir ,  Sadik O. Arf

发明人： Fereidoon Heydari ,  Hakan Ozdemir ,  Sadik O. Arf

IPC分类号： G11B5/09 ,  G11B27/36

CPC分类号： G11B5/59633

摘要： A new synchronous Partial Response Maximum Likelihood (PRML) servo is provided for a high track-per-inch disk-drive system. To increase the data capacity in hard disk drives (HDD), one can shorten the servo format and/or increase the track density. The new servo system has circuits that allow a high-performance and accurate system for positioning the read-write heads. The major circuits include burst demodulation, Viterbi detection, timing synchronization, and spin-up search. A highly linear discrete-fourier-transform (DFT) burst-demodulation circuit can demodulate high-density and low-signal-to-noise-ratio (SNR) position bursts. The Viterbi detection circuit includes a sync-mark detector and a Viterbi detector that are matched to at least two sets of Gray code ( e.g., ¼ rate and 4/12 rate) and pruned accordingly. The timing synchronization circuit includes phase restart and interpolating timing recovery (ITR) circuits to implement a fully digital timing recovery. The spin-up search circuit may include a robust multistage search circuit that detects a preamble and/or a DC field to search for an initial servo sector with a low error rate during spin up. In one example, the servo system samples each dibit 4 times throughout the entire servo sector uses PR4 equalization. The relatively low number of samples required for the system allows the servo format density to be near the channel bandwidth while increasing the SNR performance.