公开(公告)号：US08624240B2

公开(公告)日：2014-01-07

申请号：US13188215

申请日：2011-07-21

申请人： Ayumu Sato ,  Hideya Kumomi ,  Hisato Yabuta ,  Ryo Hayashi ,  Yasuyoshi Takai

发明人： Ayumu Sato ,  Hideya Kumomi ,  Hisato Yabuta ,  Ryo Hayashi ,  Yasuyoshi Takai

IPC分类号： H01L29/786

CPC分类号： H01L29/7869 ,  H01L29/66969 ,  H01L29/78618 ,  H01L29/78648

摘要： Provided is a top gate thin film transistor, including on a substrate: a source electrode layer; a drain electrode layer; an oxide semiconductor layer; a gate insulating layer; a gate electrode layer including an amorphous oxide semiconductor containing at least one kind of element selected from among In, Ga, Zn, and Sn; and a protective layer containing hydrogen, in which: the gate insulating layer is formed on a channel region of the oxide semiconductor layer; the gate electrode layer is formed on the gate insulating layer; and the protective layer is formed on the gate electrode layer.

摘要翻译： 提供了一种顶栅薄膜晶体管，其包括在基板上：源电极层; 漏电极层; 氧化物半导体层; 栅极绝缘层; 包含含有选自In，Ga，Zn和Sn中的至少一种元素的非晶氧化物半导体的栅极电极层; 以及含有氢的保护层，其中：所述栅绝缘层形成在所述氧化物半导体层的沟道区上; 栅电极层形成在栅极绝缘层上; 并且在栅电极层上形成保护层。

公开(公告)号：US20110062441A1

公开(公告)日：2011-03-17

申请号：US12992071

申请日：2009-05-11

申请人： Hisato Yabuta ,  Masato Ofuji ,  Yasuyoshi Takai ,  Takehiko Kawasaki ,  Norio Kaneko ,  Ryo Hayashi

发明人： Hisato Yabuta ,  Masato Ofuji ,  Yasuyoshi Takai ,  Takehiko Kawasaki ,  Norio Kaneko ,  Ryo Hayashi

IPC分类号： H01L33/08 ,  H01L33/16 ,  H01L33/26

CPC分类号： H01L29/78645 ,  H01L29/78633

摘要： Provided is a semiconductor device including a semiconductor element including at least a semiconductor as a component characterized by including: a mechanism for irradiating the semiconductor with light having a wavelength longer than an absorption edge wavelength of the semiconductor; and a dimming mechanism, provided in a part of an optical path through which the light passes, for adjusting at least one factor selected from an intensity, irradiation time and the wavelength of the light, wherein a threshold voltage of the semiconductor element is varied by the light adjusted by the dimming mechanism.

摘要翻译： 提供一种半导体器件，其包括至少包含半导体作为元件的半导体元件，其特征在于包括：用于使波长比半导体的吸收边缘波长长的光照射半导体的机构; 以及调光机构，其设置在光通过的光路的一部分中，用于调节从强度，照射时间和光的波长选择的至少一个因素，其中半导体元件的阈值电压被改变 光由调光机构调节。

公开(公告)号：US08513662B2

公开(公告)日：2013-08-20

申请号：US12992071

申请日：2009-05-11

申请人： Hisato Yabuta ,  Masato Ofuji ,  Yasuyoshi Takai ,  Takehiko Kawasaki ,  Norio Kaneko ,  Ryo Hayashi

发明人： Hisato Yabuta ,  Masato Ofuji ,  Yasuyoshi Takai ,  Takehiko Kawasaki ,  Norio Kaneko ,  Ryo Hayashi

IPC分类号： H01L29/72

CPC分类号： H01L29/78645 ,  H01L29/78633

摘要： Provided is a semiconductor device including a semiconductor element including at least a semiconductor as a component characterized by including: a mechanism for irradiating the semiconductor with light having a wavelength longer than an absorption edge wavelength of the semiconductor; and a dimming mechanism, provided in a part of an optical path through which the light passes, for adjusting at least one factor selected from an intensity, irradiation time and the wavelength of the light, wherein a threshold voltage of the semiconductor element is varied by the light adjusted by the dimming mechanism.

摘要翻译： 提供一种半导体器件，其包括至少包含半导体作为元件的半导体元件，其特征在于包括：用于使波长比半导体的吸收边缘波长长的光照射半导体的机构; 以及调光机构，其设置在光通过的光路的一部分中，用于调节从强度，照射时间和光的波长选择的至少一个因素，其中半导体元件的阈值电压被改变 光由调光机构调节。

公开(公告)号：US08502217B2

公开(公告)日：2013-08-06

申请号：US12679901

申请日：2008-11-27

申请人： Ayumu Sato ,  Ryo Hayashi ,  Hisato Yabuta ,  Tomohiro Watanabe

发明人： Ayumu Sato ,  Ryo Hayashi ,  Hisato Yabuta ,  Tomohiro Watanabe

IPC分类号： H01L29/12 ,  H01L23/04 ,  H01L31/036 ,  H01L31/0376 ,  H01L27/01

CPC分类号： H01L29/7869 ,  H01L29/4908 ,  H01L29/78606

摘要： Provided is an oxide semiconductor device including an oxide semiconductor layer and an insulating layer coming into contact with the oxide semiconductor layer in which the insulating layer includes: a first insulating layer coming into contact with an oxide semiconductor, having a thickness of 50 nm or more, and including an oxide containing Si and O; a second insulating layer coming into contact with the first insulating layer, having a thickness of 50 nm or more, and including a nitride containing Si and N; and a third insulating layer coming into contact with the second insulating layer, the first insulating layer and the second insulating layer having hydrogen contents of 4×1021 atoms/cm3 or less, and the third insulating layer having a hydrogen content of more than 4×1021 atoms/cm3.

摘要翻译： 提供一种氧化物半导体器件，其包括氧化物半导体层和与氧化物半导体层接触的绝缘层，其中绝缘层包括：与氧化物半导体接触的第一绝缘层，其厚度为50nm以上 并且包括含有Si和O的氧化物; 与第一绝缘层接触的第二绝缘层，其厚度为50nm以上，并且包括含有Si和N的氮化物; 以及与第二绝缘层接触的第三绝缘层，具有4×1021原子/ cm3以下的氢含量的第一绝缘层和第二绝缘层，以及氢含量大于4× 1021原子/ cm3。

公开(公告)号：US08445902B2

公开(公告)日：2013-05-21

申请号：US12990408

申请日：2009-04-28

申请人： Ayumu Sato ,  Ryo Hayashi ,  Hisato Yabuta ,  Masafumi Sano

发明人： Ayumu Sato ,  Ryo Hayashi ,  Hisato Yabuta ,  Masafumi Sano

IPC分类号： H01L29/10 ,  H01L29/12

CPC分类号： H01L29/7869 ,  H01L29/78621

摘要： Provided are a coplanar structure thin film transistor that allows a threshold voltage to change only a little under electric stress, and a method of manufacturing the same. The thin film transistor includes on a substrate at least: a gate electrode; a gate insulating layer; an oxide semiconductor layer including a source electrode, a drain electrode, and a channel region; a channel protection layer; and an interlayer insulating layer. The channel protection layer includes one or more layers, the layer in contact with the oxide semiconductor layer among the one or more layers being made of an insulating material containing oxygen, ends of the channel protection layer are thinner than a central part of the channel protection layer, the interlayer insulating layer contains hydrogen, and regions of the oxide semiconductor layer that are in direct contact with the interlayer insulating layer form the source electrode and the drain electrode.

摘要翻译： 提供一种共面结构薄膜晶体管，其制造方法允许阈值电压在电应力下变化很小。 薄膜晶体管至少在基板上包括：栅电极; 栅极绝缘层; 包括源电极，漏电极和沟道区的氧化物半导体层; 通道保护层; 和层间绝缘层。 沟道保护层包括一层或多层，一层或多层中与氧化物半导体层接触的层由含氧的绝缘材料制成，沟道保护层的端部比通道保护层的中心部分薄 层间绝缘层含有氢，与层间绝缘层直接接触的氧化物半导体层的区域形成源电极和漏电极。

公开(公告)号：US20110042670A1

公开(公告)日：2011-02-24

申请号：US12990408

申请日：2009-04-28

申请人： Ayumu Sato ,  Ryo Hayashi ,  Hisato Yabuta ,  Masafumi Sano

发明人： Ayumu Sato ,  Ryo Hayashi ,  Hisato Yabuta ,  Masafumi Sano

IPC分类号： H01L29/786 ,  H01L21/44

CPC分类号： H01L29/7869 ,  H01L29/78621

摘要： Provided are a coplanar structure thin film transistor that allows a threshold voltage to change only a little under electric stress, and a method of manufacturing the same. The thin film transistor includes on a substrate at least: a gate electrode; a gate insulating layer; an oxide semiconductor layer including a source electrode, a drain electrode, and a channel region; a channel protection layer; and an interlayer insulating layer. The channel protection layer includes one or more layers, the layer in contact with the oxide semiconductor layer among the one or more layers being made of an insulating material containing oxygen, ends of the channel protection layer are thinner than a central part of the channel protection layer, the interlayer insulating layer contains hydrogen, and regions of the oxide semiconductor layer that are in direct contact with the interlayer insulating layer form the source electrode and the drain electrode.

摘要翻译： 提供一种共面结构薄膜晶体管，其制造方法允许阈值电压在电应力下变化很小。 薄膜晶体管至少在基板上包括：栅电极; 栅极绝缘层; 包括源电极，漏电极和沟道区的氧化物半导体层; 通道保护层; 和层间绝缘层。 沟道保护层包括一层或多层，一层或多层中与氧化物半导体层接触的层由含氧的绝缘材料制成，沟道保护层的端部比通道保护层的中心部分薄 层间绝缘层含有氢，与层间绝缘层直接接触的氧化物半导体层的区域形成源电极和漏电极。

公开(公告)号：US20100283049A1

公开(公告)日：2010-11-11

申请号：US12679901

申请日：2008-11-27

申请人： Ayumu Sato ,  Ryo Hayashi ,  Hisato Yabuta ,  Tomohiro Watanabe

发明人： Ayumu Sato ,  Ryo Hayashi ,  Hisato Yabuta ,  Tomohiro Watanabe

IPC分类号： H01L33/00 ,  H01L29/02 ,  H01L29/786

CPC分类号： H01L29/7869 ,  H01L29/4908 ,  H01L29/78606

摘要： Provided is an oxide semiconductor device including an oxide semiconductor layer and an insulating layer coming into contact with the oxide semiconductor layer in which the insulating layer includes: a first insulating layer coming into contact with an oxide semiconductor, having a thickness of 50 nm or more, and including an oxide containing Si and O; a second insulating layer coming into contact with the first insulating layer, having a thickness of 50 nm or more, and including a nitride containing Si and N; and a third insulating layer coming into contact with the second insulating layer, the first insulating layer and the second insulating layer having hydrogen contents of 4×1021 atoms/cm3 or less, and the third insulating layer having a hydrogen content of more than 4×1021 atoms/cm3.

摘要翻译： 提供一种氧化物半导体器件，其包括氧化物半导体层和与氧化物半导体层接触的绝缘层，其中绝缘层包括：与氧化物半导体接触的第一绝缘层，其厚度为50nm以上 并且包括含有Si和O的氧化物; 与第一绝缘层接触的第二绝缘层，其厚度为50nm以上，并且包括含有Si和N的氮化物; 以及与第二绝缘层接触的第三绝缘层，具有4×1021原子/ cm3以下的氢含量的第一绝缘层和第二绝缘层，以及氢含量大于4× 1021原子/ cm3。

公开(公告)号：US20120032173A1

公开(公告)日：2012-02-09

申请号：US13188215

申请日：2011-07-21

申请人： Ayumu Sato ,  Hideya Kumomi ,  Hisato Yabuta ,  Ryo Hayashi ,  Yasuyoshi Takai

发明人： Ayumu Sato ,  Hideya Kumomi ,  Hisato Yabuta ,  Ryo Hayashi ,  Yasuyoshi Takai

IPC分类号： H01L29/786 ,  H01L33/16 ,  H01L29/04

CPC分类号： H01L29/7869 ,  H01L29/66969 ,  H01L29/78618 ,  H01L29/78648

摘要： Provided is a top gate thin film transistor, including on a substrate: a source electrode layer; a drain electrode layer; an oxide semiconductor layer; a gate insulating layer; a gate electrode layer including an amorphous oxide semiconductor containing at least one kind of element selected from among In, Ga, Zn, and Sn; and a protective layer containing hydrogen, in which: the gate insulating layer is formed on a channel region of the oxide semiconductor layer; the gate electrode layer is formed on the gate insulating layer; and the protective layer is formed on the gate electrode layer.

摘要翻译： 提供了一种顶栅薄膜晶体管，其包括在基板上：源电极层; 漏电极层; 氧化物半导体层; 栅极绝缘层; 包含含有选自In，Ga，Zn和Sn中的至少一种元素的非晶氧化物半导体的栅极电极层; 以及含有氢的保护层，其中：所述栅绝缘层形成在所述氧化物半导体层的沟道区上; 栅电极层形成在栅极绝缘层上; 并且在栅电极层上形成保护层。

公开(公告)号：US08415198B2

公开(公告)日：2013-04-09

申请号：US12374665

申请日：2007-07-26

申请人： Naho Itagaki ,  Toru Den ,  Nobuyuki Kaji ,  Ryo Hayashi ,  Masafumi Sano

发明人： Naho Itagaki ,  Toru Den ,  Nobuyuki Kaji ,  Ryo Hayashi ,  Masafumi Sano

IPC分类号： H01L21/00

CPC分类号： H01L29/7869

摘要： A production method of a thin film transistor including an active layer including an amorphous oxide semiconductor film, wherein a step of forming the active layer includes a first step of forming the oxide film in an atmosphere having an introduced oxygen partial pressure of 1×10−3 Pa or less, and a second step of annealing the oxide film in an oxidative atmosphere after the first step.

摘要翻译： 1.一种薄膜晶体管的制造方法，其特征在于，具备包含非晶形氧化物半导体膜的有源层的薄膜晶体管，其特征在于，形成有源层的工序包括在引入氧分压为1×10 -5的气氛中形成氧化膜的第1工序， 3Pa以下，以及在第一工序后的氧化性气氛中退火氧化膜的第二工序。

公开(公告)号：US20090325341A1

公开(公告)日：2009-12-31

申请号：US12374665

申请日：2007-07-26

申请人： Naho Itagaki ,  Toru Den ,  Nobuyuki Kaji ,  Ryo Hayashi ,  Masafumi Sano

发明人： Naho Itagaki ,  Toru Den ,  Nobuyuki Kaji ,  Ryo Hayashi ,  Masafumi Sano

IPC分类号： H01L21/336

CPC分类号： H01L29/7869

摘要： A production method of a thin film transistor including an active layer including an amorphous oxide semiconductor film, wherein a step of forming the active layer includes a first step of forming the oxide film in an atmosphere having an introduced oxygen partial pressure of 1×10−3 Pa or less, and a second step of annealing the oxide film in an oxidative atmosphere after the first step.

摘要翻译： 一种薄膜晶体管的制造方法，其特征在于，具备包含非晶形氧化物半导体膜的活性层的薄膜晶体管，其特征在于，形成有源层的工序包括在导入氧分压为1×10 -3 Pa的气氛中形成氧化膜的第1工序 以及在第一工序后的氧化性气氛中退火氧化膜的第二工序。