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    Thin film transistor array substrate and method of fabricating the same
    22.
    发明授权
    Thin film transistor array substrate and method of fabricating the same 有权
    薄膜晶体管阵列基板及其制造方法

    公开(公告)号：US07279370B2

    公开(公告)日：2007-10-09

    申请号：US10958260

    申请日：2004-10-06

    申请人： Byoung Ho Lim ,  Hyun Sik Seo ,  Heung Lyul Cho ,  Hong Sik Kim

    发明人： Byoung Ho Lim ,  Hyun Sik Seo ,  Heung Lyul Cho ,  Hong Sik Kim

    IPC分类号： H01L21/00 ,  H01L29/00

    CPC分类号： H01L27/1288 ,  G02F1/13458 ,  G02F1/136227 ,  G02F2001/136236 ,  H01L27/1214 ,  H01L27/124 ,  H01L27/1255 ,  H01L29/66742

    摘要： A thin film transistor array substrate device includes a gate line formed on a substrate, a data line crossing the gate line with a gate insulating pattern position therebetween, a thin film transistor at a crossing of the gate line and the data line, a pixel electrode formed at a pixel region defined by the crossing of the gate line and the data line and connected to the thin film transistor, a gate pad part having a lower gate pad electrode connected to the gate line and an upper gate pad electrode connected to the lower gate pad electrode, a data pad part having a lower data pad electrode connected to the date line and an upper data pad electrode connected to the lower data pad electrode, and a passivation film pattern formed at a region besides the region including the pixel electrode, the upper data pad electrode, and the upper gate pad electrode, wherein the pixel electrode is formed on the gate insulating pattern of the pixel region exposed by the passivation film pattern.

    摘要翻译： 薄膜晶体管阵列基板装置包括形成在基板上的栅极线，与栅极线交叉的数据线与栅极绝缘图案位置之间，栅极线与数据线交叉的薄膜晶体管，像素电极 形成在由栅极线和数据线的交叉限定并连接到薄膜晶体管的像素区域处，具有连接到栅极线的下部栅极焊盘电极的栅极焊盘部分和连接到栅极线的下部栅极焊盘电极 栅极焊盘电极，具有连接到日期线的下部数据焊盘电极的数据焊盘部分和连接到下部数据焊盘电极的上部数据焊盘电极，以及形成在除了像素电极之外的区域处的钝化膜图案， 上部数据焊盘电极和上部栅极焊盘电极，其中像素电极形成在由钝化膜图案曝光的像素区域的栅极绝缘图案上。