公开(公告)号：US08542779B2

公开(公告)日：2013-09-24

申请号：US13754819

申请日：2013-01-30

Applicant: Innophase Inc.

Inventor： Yang Xu

IPC: H03D3/18 ,  H03D3/24

CPC classification number: H04L27/2272 ,  H04L27/2071 ,  H04L27/22

Abstract: A receiver is described. The receiver includes a first injection-locked oscillator having a first input configured to receive a BPSK signal and a second input configured to receive a first frequency reference. The receiver also includes a second injection-locked oscillator having a third input configured to receive the BPSK signal and a fourth input configured to receive a second frequency reference. Further, the receiver includes a first phase-locked loop coupled with the second input of the first injection-locked oscillator. The first phase-locked loop is configured to generate the first frequency reference. And, a second phase-locked loop is coupled with the fourth input of the second injection-locked oscillator. The second phase-locked loop is configured to generate the second frequency reference.

Abstract translation: 描述接收机。 接收机包括第一注入锁定振荡器，其具有被配置为接收BPSK信号的第一输入和被配置为接收第一频率参考的第二输入。 接收机还包括第二注入锁定振荡器，其具有被配置为接收BPSK信号的第三输入和被配置为接收第二频率参考的第四输入。 此外，接收机包括与第一注入锁定振荡器的第二输入耦合的第一锁相环。 第一锁相环被配置为产生第一频率参考。 并且，第二锁相环与第二注入锁定振荡器的第四输入耦合。 第二锁相环被配置为产生第二频率参考。

公开(公告)号：US20130195157A1

公开(公告)日：2013-08-01

申请号：US13754853

申请日：2013-01-30

Applicant: Innophase Inc.

Inventor： Yang Xu

IPC: H04L27/20

CPC classification number: H04L27/2272 ,  H04L27/2071 ,  H04L27/22

Abstract: A transceiver is described. The transceiver includes a first injection-locked oscillator and a second injection-locked oscillator. The transceiver also includes a first phase-locked loop coupled with the first injection-locked oscillator. The first phase-locked loop is configured to generate a first frequency reference. Further, the transceiver includes a second phase-locked loop coupled the second injection-locked oscillator. The second phase-locked loop is configured to generate a second frequency reference. The transceiver includes a mixer configured to receive the first phase-locked loop output and configured to receive said second injection-locked oscillator output. The mixer is also configured to generate a carrier frequency signal based on the first injection-locked oscillator output and the second injection-locked oscillator output. And, the transceiver includes a modulator configured to receive said carrier frequency signal.

Abstract translation: 描述收发器。 收发器包括第一注入锁定振荡器和第二注入锁定振荡器。 收发器还包括与第一注入锁定振荡器耦合的第一锁相环。 第一锁相环被配置为产生第一频率参考。 此外，收发器包括耦合第二注入锁定振荡器的第二锁相环。 第二锁相环被配置为产生第二频率参考。 收发器包括配置成接收第一锁相环输出并被配置为接收所述第二注入锁定振荡器输出的混频器。 混频器还被配置为基于第一注入锁定振荡器输出和第二注入锁定振荡器输出产生载波频率信号。 并且，收发器包括被配置为接收所述载波频率信号的调制器。

公开(公告)号：US12244066B2

公开(公告)日：2025-03-04

申请号：US17772861

申请日：2020-10-28

Applicant: Innophase, Inc.

Inventor： Jeffrey Shamblin ,  Yang Xu ,  Claudio Anzil

IPC: H01Q21/06 ,  H01Q5/307 ,  H01Q9/16 ,  H01Q13/00

Abstract: A dual-band, tri-band, or higher-order multi-band array of antenna elements, with each element, or subsets of elements, connected to multiple radios at each antenna port. In one embodiment, an array comprises a 128 element Massive MIMO array having 64 horizontally-polarized (H-pol) and 64 vertically-polarized (V-pol) elements configured to provide dual polarization capability over multiple bands to accommodate highly-configurable simultaneous 4G and 5G operation.

公开(公告)号：US20240007152A1

公开(公告)日：2024-01-04

申请号：US18346191

申请日：2023-06-30

Applicant: Innophase, Inc.

Inventor： Yang Xu ,  Nicolo Testi ,  Jongheon Kim

IPC: H04B7/0426 ,  H04L27/26

CPC classification number: H04B7/043 ,  H04L27/26025

Abstract: Transceiver integrated circuit suitable for distributed placement across an active antenna unit. ICs with two serial data ports configured to transmit and receive aggregated signal-port IQ data packets with adjacent ICs within a subarray of ICs, or to a beamformer processor. A packet header inspection circuit may identify aggregated signal-port IQ data packets for local processing, and identify received aggregated signal-port IQ data packets for processing by another device.

公开(公告)号：US20230129253A1

公开(公告)日：2023-04-27

申请号：US18069118

申请日：2022-12-20

Applicant: Innophase, Inc.

Inventor： Yang Xu ,  Jeffrey Shamblin

IPC: H01Q21/22 ,  H04B1/401 ,  H04B1/44 ,  H04B7/06

Abstract: A configurable array having a plurality of antenna elements arranged in at least four adjacent groups of array elements on a panel array, the first group of elements having an inter-element spacing based on a transmit signal wavelength, a second group of elements having an inter-element spacing based on a receive signal wavelength, and a third and fourth group of elements having an inter-element spacing based on a wavelength between the transmit signal wavelength and the receive signal wavelength.

公开(公告)号：US11095296B2

公开(公告)日：2021-08-17

申请号：US16890771

申请日：2020-06-02

Applicant: Innophase, Inc.

Inventor： Sara Munoz Hermoso ,  Per Konradsson ,  Yang Xu

IPC: H03L7/099 ,  H03B5/12

Abstract: An example method in accordance with some embodiments includes: determining an output frequency control word (FCW) having a plurality of bits, the output FCW being configured to control an oscillator, the oscillator including a plurality of capacitor banks, the plurality of capacitor banks respectively corresponding to the plurality of bits of the output FCW; storing the output FCW in a clocked delay cell; providing an input clock to the clocked delay cell, wherein the input clock is provided to delay the output FCW by an amount of delay; and, in accordance with the input clock, releasing the delayed output FCW from the clocked delay cell, and respectively applying the plurality of bits of the delayed output FCW to the plurality of capacitor banks of the oscillator.

公开(公告)号：US11057062B2

公开(公告)日：2021-07-06

申请号：US16842629

申请日：2020-04-07

Applicant: Innophase, Inc.

Inventor： Roc Berenguer Perez ,  Yang Xu

IPC: H04B1/04 ,  H03L7/197 ,  H03L7/099

Abstract: An example method according to some embodiments includes receiving, from a modulator, a phase-modulated carrier output signal having a carrier center frequency that is a non-integer multiple of a desired carrier center frequency; generating, by an injection-locked ring oscillator (ILRO), a plurality of phases of the phase-modulated carrier output signal at a plurality of outputs of the ILRO; generating a decoupled fractional frequency output signal by sequentially selecting, using a multiplexer, successive outputs of the plurality of outputs corresponding to successive phases of the plurality of phases, the decoupled fractional frequency output signal having a center frequency equal to an integer multiple of the desired carrier center frequency; and generating, based on the decoupled fractional frequency output signal, a desired phase-modulated carrier output signal that is decoupled from the modulator, the desired phase-modulated carrier output signal having a generated carrier center frequency equal to the desired carrier center frequency.

公开(公告)号：US20200280293A1

公开(公告)日：2020-09-03

申请号：US16811883

申请日：2020-03-06

Applicant: Innophase, Inc.

Inventor： Nicolo Testi ,  Yang Xu

IPC: H03G5/28 ,  H03B5/12 ,  H03H7/09 ,  H03H11/06

Abstract: A low noise amplifier includes at least two variable gain amplifier stages, each variable gain amplifier configured to accept an input signal and to provide a load driving signal; a tunable bandpass filter connected as a load to each variable gain amplifier stage, wherein each bandpass filter includes a resonant tank, each resonant tank including an inductor, wherein each inductor of each resonant tank is oriented in orthogonal relation with respect to each respective longitudinal axis of each next inductor, the orthogonal relation of the respective longitudinal axes configured to reduce mutual coupling between the tunable bandpass filters; a cross-coupled transistor pair, and at least one cross-coupled compensation transistor pair biased in a subthreshold region configured to add a transconductance component as a function of a load driving signal; and, a controller circuit configured to tune each tunable bandpass filter.

公开(公告)号：US20200083857A1

公开(公告)日：2020-03-12

申请号：US16125480

申请日：2018-09-07

Applicant: Innophase Inc.

Inventor： Nicolo Testi ,  Yang Xu

IPC: H03G5/28 ,  H03B5/12 ,  H03H7/09 ,  H03H11/06

Abstract: A low noise amplifier includes at least two variable gain amplifier stages, each variable gain amplifier configured to accept an input signal and to provide a load driving signal; a tunable bandpass filter connected as a load to each variable gain amplifier stage, wherein each bandpass filter includes a resonant tank, each resonant tank including an inductor, wherein each inductor of each resonant tank is oriented in orthogonal relation with respect to each respective longitudinal axis of each next inductor, the orthogonal relation of the respective longitudinal axes configured to reduce mutual coupling between the tunable bandpass filters; a cross-coupled transistor pair, and at least one cross-coupled compensation transistor pair biased in a subthreshold region configured to add a transconductance component as a function of a load driving signal; and, a controller circuit configured to tune each tunable bandpass filter.

公开(公告)号：US20190052295A1

公开(公告)日：2019-02-14

申请号：US16160521

申请日：2018-10-15

Applicant: Innophase, Inc.

Inventor： Yang Xu ,  Sara Munoz Hermoso

IPC: H04B1/16 ,  H04J1/02 ,  H04L27/06 ,  H04L27/22 ,  H04L27/14 ,  H04L27/38 ,  H04W4/80

CPC classification number: H04B1/16 ,  H04B14/008 ,  H04J1/02 ,  H04L27/00 ,  H04L27/06 ,  H04L27/14 ,  H04L27/22 ,  H04L27/233 ,  H04L27/38 ,  H04L27/3845 ,  H04W4/80 ,  Y02D70/00 ,  Y02D70/10 ,  Y02D70/14 ,  Y02D70/144 ,  Y02D70/40

Abstract: Circuitry and methods are described for digital signal demodulation. In a configurable receiver, a method includes receiving a radio frequency signal at the configurable receiver, operating the configurable receiver in a first mode, the first mode including providing the radio frequency signal to an amplitude detection circuit to determine an amplitude, providing the radio frequency signal to a phase detection circuit to determine a phase, and providing the amplitude and phase to a coordinate rotation digital computer (CORDIC) logic circuit, and operating the configurable receiver in a low power mode upon receiving an indication to selectively disable the amplitude detection circuit, the low power mode including providing the radio frequency signal to the phase detection circuit to determine the phase, and providing the phase and a predetermined constant value in lieu of the amplitude to the CORDIC logic circuit.