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21.发明申请公开(公告)号：US20130246738A1
公开(公告)日：2013-09-19
申请号：US13421456
申请日：2012-03-15
申请人： Jonathan D. Bradbury , Michael K. Gschwind , Christian Jacobi , Eric M. Schwarz , Timothy J. Slegel
发明人： Jonathan D. Bradbury , Michael K. Gschwind , Christian Jacobi , Eric M. Schwarz , Timothy J. Slegel
CPC分类号： G06F9/30043 , G06F9/30007 , G06F9/30036 , G06F9/3004 , G06F9/30047 , G06F9/30098 , G06F9/3013 , G06F9/30145 , G06F9/3824 , G06F9/3861 , G06F9/45516
摘要： A Load to Block Boundary instruction is provided that loads a variable number of bytes of data into a register while ensuring that a specified memory boundary is not crossed. The boundary may be specified a number of ways, including, but not limited to, a variable value in the instruction text, a fixed instruction text value encoded in the opcode, or a register based boundary.
摘要翻译： 加载到块提供了将可变数量的字节数据加载到寄存器中，同时确保指定的存储器边界未被越过。 边界可以指定多种方式，包括但不限于指令文本中的可变值，编码在操作码中的固定指令文本值或基于寄存器的边界。
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公开(公告)号：US20130243325A1
公开(公告)日：2013-09-19
申请号：US13421614
申请日：2012-03-15
IPC分类号： G06K9/18
CPC分类号： G06F9/30036 , G06F7/02 , G06F7/20 , G06F9/30021 , G06F9/30043 , G06F17/2705 , G06F17/30657 , G06F2207/025
摘要： Multiple sets of character data having termination characters are compared using parallel processing and without causing unwarranted exceptions. Each set of character data to be compared is loaded within one or more vector registers. In particular, in one embodiment, for each set of character data to be compared, an instruction is used that loads data in a vector register to a specified boundary, and provides a way to determine the number of characters loaded. Further, an instruction is used to find the index of the first delimiter character, i.e., the first zero or null character, or the index of unequal characters. Using these instructions, a location of the end of one of the sets of data or a location of an unequal character is efficiently provided.
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公开(公告)号：US20140025929A1
公开(公告)日：2014-01-23
申请号：US13552109
申请日：2012-07-18
IPC分类号： G06F9/30
CPC分类号： G06F9/30112 , G06F9/30141 , G06F9/3838
摘要： Embodiments relate to reducing a number of read ports for register pairs. An aspect includes maintaining an active pairing indicator that is configured to have a first value or a second value. The first value indicates that the wide operand is stored in a wide register. The second value indicates that the wide operand is not stored in the wide register. The operand is read from either the wide register or a pair of registers based on the active pairing indicator. The active pairing indicator and the values of the set of wide registers are stored to a storage based on a request to store a register pairing status. A saved pairing indicator and saved values of the set of wide registers is loaded from the storage respectively into an active pairing register and wide registers.
摘要翻译： 实施例涉及减少用于寄存器对的多个读端口。 一个方面包括维持被配置为具有第一值或第二值的活动配对指示符。 第一个值表示宽操作数存储在一个宽的寄存器中。 第二个值表示宽操作数不存储在宽寄存器中。 基于活动配对指示器，从宽寄存器或一对寄存器读取操作数。 基于存储寄存器配对状态的请求，将活动配对指示符和宽寄存器组的值存储到存储器中。 一组保存的配对指示器和一组宽寄存器的保存值分别从存储器加载到有源配对寄存器和宽寄存器中。
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公开(公告)号：US20130246754A1
公开(公告)日：2013-09-19
申请号：US13422550
申请日：2012-03-16
IPC分类号： G06F9/30
CPC分类号： G06F11/3644 , G06F9/3005 , G06F9/30058 , G06F9/30076 , G06F9/30145 , G06F9/45533 , G06F11/3466 , G06F11/348 , G06F11/3612 , G06F11/362 , G06F11/3636 , G06F11/3648 , G06F11/3664 , G06F2201/86 , G06F2201/87
摘要： Embodiments of the invention relate to implementing run-time instrumentation indirect sampling by address. An aspect of the invention includes reading sample-point addresses from a sample-point address array, and comparing, by a processor, the sample-point addresses to an address associated with an instruction from an instruction stream executing on the processor. A sample point is recognized upon execution of the instruction associated with the address matching one of the sample-point addresses. Run-time instrumentation information is obtained from the sample point. The run-time instrumentation information is stored in a run-time instrumentation program buffer as a reporting group.
摘要翻译： 本发明的实施例涉及通过地址实现运行时间仪器间接采样。 本发明的一个方面包括从采样点地址阵列中读取采样点地址，以及将处理器将采样点地址与来自在处理器上执行的指令流的指令相关联的地址进行比较。 在执行与匹配其中一个采样点地址的地址相关联的指令时识别采样点。 从采样点获取运行时仪表信息。 运行时仪表信息作为报告组存储在运行时仪表程序缓冲区中。
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公开(公告)号：US09405541B2
公开(公告)日：2016-08-02
申请号：US13422550
申请日：2012-03-16
CPC分类号： G06F11/3644 , G06F9/3005 , G06F9/30058 , G06F9/30076 , G06F9/30145 , G06F9/45533 , G06F11/3466 , G06F11/348 , G06F11/3612 , G06F11/362 , G06F11/3636 , G06F11/3648 , G06F11/3664 , G06F2201/86 , G06F2201/87
摘要： The invention relates to implementing run-time instrumentation indirect sampling by address. An aspect of the invention includes a method for implementing run-time instrumentation indirect sampling by address. The method includes reading sample-point addresses from a sample-point address array, and comparing, by a processor, the sample-point addresses to an address associated with an instruction from an instruction stream executing on the processor. The method further includes recognizing a sample point upon execution of the instruction associated with the address matching one of the sample-point addresses. Run-time instrumentation information is obtained from the sample point. The method also includes storing the run-time instrumentation information in a run-time instrumentation program buffer as a reporting group.
摘要翻译： 本发明涉及通过地址实现运行时仪表间接采样。 本发明的一个方面包括一种通过地址实现运行时间仪表间接采样的方法。 该方法包括从采样点地址阵列中读取采样点地址，以及将处理器将采样点地址与来自在处理器上执行的指令流的指令相关联的地址进行比较。 该方法还包括在执行与匹配其中一个采样点地址的地址相关联的指令时识别采样点。 从采样点获取运行时仪表信息。 该方法还包括将运行时仪器信息存储在作为报告组的运行时仪表程序缓冲器中。
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26.发明授权公开(公告)号：US09367316B2
公开(公告)日：2016-06-14
申请号：US13422563
申请日：2012-03-16
CPC分类号： G06F9/30145 , G06F9/3005 , G06F9/30058 , G06F11/3466 , G06F11/348 , G06F11/3644 , G06F2201/86 , G06F2201/88
摘要： Embodiments of the invention relate to implementing run-time instrumentation indirect sampling by instruction operation code. An aspect of the invention includes reading sample-point instruction operation codes from a sample-point instruction array, and comparing, by a processor, the sample-point instruction operation codes to an operation code of an instruction from an instruction stream executing on the processor. A sample point is recognized upon execution of the instruction with the operation code matching one of the sample-point instruction operation codes. The run-time instrumentation information is obtained from the sample point. The run-time instrumentation information is stored in a run-time instrumentation program buffer as a reporting group.
摘要翻译： 本发明的实施例涉及通过指令操作代码实现运行时间仪表间接采样。 本发明的一个方面包括从采样点指令阵列读取采样点指令操作码，并将处理器将采样点指令操作码与来自在处理器上执行的指令流的指令的操作码进行比较 。 在执行指令时，识别采样点，其中操作码与采样点指令操作码之一匹配。 从采样点获取运行时仪表信息。 运行时仪表信息作为报告组存储在运行时仪表程序缓冲区中。
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公开(公告)号：US09323529B2
公开(公告)日：2016-04-26
申请号：US13552099
申请日：2012-07-18
CPC分类号： G06F9/30141 , G06F9/30 , G06F9/30014 , G06F9/3005 , G06F9/30098 , G06F9/30185
摘要： Embodiments relate to reducing a number of read ports for register pairs. An aspect includes executing an instruction. The instruction identifies a pair of registers as containing a wide operand which spans the pair of registers. It is determined if a pairing indicator associated with the pair of registers has a first value or a second value. The first value indicates that the wide operand is stored in a wide register, and the second value indicates that the wide operand is not stored in the wide register. Based on the pairing indicator having the first value, the wide operand is read from the wide register. Based on the pairing indicator having the second value, the wide operand is read from the pair of registers. An operation is performed using the wide operand.
摘要翻译： 实施例涉及减少用于寄存器对的多个读端口。 一方面包括执行指令。 该指令将一对寄存器标识为包含跨越寄存器对的宽操作数。 确定与该对寄存器相关联的配对指示符是否具有第一值或第二值。 第一个值表示宽操作数存储在宽寄存器中，第二个值表示宽操作数不存储在宽寄存器中。 基于具有第一值的配对指示符，从宽寄存器读取宽操作数。 基于具有第二值的配对指示符，从该对寄存器读取宽操作数。 使用宽操作数执行操作。
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公开(公告)号：US09411591B2
公开(公告)日：2016-08-09
申请号：US13422588
申请日：2012-03-16
CPC分类号： G06F9/30145 , G06F9/3005 , G06F9/30058 , G06F9/45533 , G06F11/3466 , G06F11/348 , G06F11/3612 , G06F11/362 , G06F11/3664 , G06F2201/86 , G06F2201/87
摘要： Embodiments of the invention relate to implementing run-time instrumentation sampling in transactional-execution mode. An aspect of the invention includes determining, by a processor, that the processor is configured to execute instructions of an instruction stream in a transactional-execution mode, the instructions defining a transaction. Completion of storage operations of the instructions is interlocked to prevent instruction-directed storage until completion of the transaction. A sample point is recognized during execution of the instructions while in the transactional-execution mode. Run-time-instrumentation-directed storing is performed, upon successful completion of the transaction, run-time instrumentation information obtained at the sample point.
摘要翻译： 本发明的实施例涉及在事务执行模式中实现运行时仪表采样。 本发明的一个方面包括由处理器确定处理器被配置为以事务执行模式执行指令流的指令，所述指令定义事务。 完成指令的存储操作是互锁的，以防止指令存储直到完成交易。 在事务执行模式下，在指令执行期间识别采样点。 在成功完成交易后，执行运行时仪表化存储，在采样点获取的运行时仪表信息。
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公开(公告)号：US20140025928A1
公开(公告)日：2014-01-23
申请号：US13552108
申请日：2012-07-18
IPC分类号： G06F9/30
CPC分类号： G06F9/30185 , G06F9/30014 , G06F9/30098
摘要： Embodiments relate to reducing a number of read ports for register pairs. An aspect includes executing an instruction. The instruction identifies a pair of registers as containing a wide operand which spans the pair of registers. The executing of the instruction includes determining whether a pairing indicator associated with the pair of registers has a first value, a second value or a third value. Based on the pairing indicator having the first value, the wide operand is read from the wide register. Based on the pairing indicator having the second value the wide operand is read from the pair of registers. Based on the pairing indicator having the third value, the wide operand is speculatively read from a predetermined register. The predetermined register consists of the wide register or the pair of registers.
摘要翻译： 实施例涉及减少用于寄存器对的多个读端口。 一方面包括执行指令。 该指令将一对寄存器标识为包含跨越寄存器对的宽操作数。 指令的执行包括确定与该对寄存器相关联的配对指示符是否具有第一值，第二值或第三值。 基于具有第一值的配对指示符，从宽寄存器读取宽操作数。 基于具有第二值的配对指示符，从该对寄存器读取宽操作数。 基于具有第三值的配对指示符，从预定的寄存器推测地读取宽操作数。 预定寄存器由宽寄存器或寄存器对组成。
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公开(公告)号：US20130247010A1
公开(公告)日：2013-09-19
申请号：US13422588
申请日：2012-03-16
IPC分类号： G06F9/44
CPC分类号： G06F9/30145 , G06F9/3005 , G06F9/30058 , G06F9/45533 , G06F11/3466 , G06F11/348 , G06F11/3612 , G06F11/362 , G06F11/3664 , G06F2201/86 , G06F2201/87
摘要： Embodiments of the invention relate to implementing run-time instrumentation sampling in transactional-execution mode. An aspect of the invention includes run time instrumentation sampling in transactional execution mode. The method includes determining, by a processor, that the processor is configured to execute instructions of an instruction stream in a transactional-execution mode, the instructions defining a transaction. Completion of storage operations of the instructions is interlocked to prevent instruction-directed storage until completion of the transaction. A sample point is recognized during execution of the instructions while in the transactional-execution mode. Run-time-instrumentation-directed storing is performed, upon successful completion of the transaction, run-time instrumentation information obtained at the sample point.
摘要翻译： 本发明的实施例涉及在事务执行模式中实现运行时仪表采样。 本发明的一个方面包括事务执行模式中的运行时间仪表采样。 该方法包括由处理器确定处理器被配置为以事务执行模式执行指令流的指令，定义事务的指令。 完成指令的存储操作是互锁的，以防止指令存储直到完成交易。 在事务执行模式下，在指令执行期间识别采样点。 在成功完成交易后，执行运行时仪表化存储，在采样点获取的运行时仪表信息。
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