公开(公告)号：US08610196B2

公开(公告)日：2013-12-17

申请号：US13608436

申请日：2012-09-10

申请人： Tetsufumi Tanamoto ,  Kosuke Tatsumura ,  Kiwamu Sakuma ,  Atsuhiro Kinoshita ,  Shinobu Fujita ,  Koichi Muraoka

发明人： Tetsufumi Tanamoto ,  Kosuke Tatsumura ,  Kiwamu Sakuma ,  Atsuhiro Kinoshita ,  Shinobu Fujita ,  Koichi Muraoka

IPC分类号： H01L27/11

CPC分类号： H01L29/42332 ,  G11C11/412 ,  G11C14/0063 ,  H01L27/1104 ,  H01L29/7881

摘要： In a memory of an embodiment, first and second P-channel transistors are formed on a first semiconductor region, and each of the first and second P-channel transistors has a structure formed by stacking a first insulating film, a first floating gate, a second insulating film, a second floating gate, a third insulating film, and a first control gate in this order on the first semiconductor region. In the memory, first and second N-channel transistors are formed on a second semiconductor region, and each of the first and second N-channel transistors has a structure formed by stacking a fourth insulating film, a third floating gate, a fifth insulating film, a fourth floating gate, a sixth insulating film, and a second control gate in this order on the second semiconductor region.

摘要翻译： 在实施例的存储器中，第一和第二P沟道晶体管形成在第一半导体区域上，并且第一和第二P沟道晶体管中的每一个具有通过堆叠第一绝缘膜，第一浮动栅极， 第二绝缘膜，第二浮栅，第三绝缘膜和第一控制栅极。 在存储器中，第一和第二N沟道晶体管形成在第二半导体区域上，并且第一和第二N沟道晶体管中的每一个具有通过堆叠第四绝缘膜，第三浮栅，第五绝缘膜 ，第四浮栅，第六绝缘膜和第二控制栅极。

公开(公告)号：US20120280303A1

公开(公告)日：2012-11-08

申请号：US13366845

申请日：2012-02-06

申请人： Masahiro KIYOTOSHI ,  Kiwamu Sakuma ,  Haruka Kusai

发明人： Masahiro KIYOTOSHI ,  Kiwamu Sakuma ,  Haruka Kusai

IPC分类号： H01L29/788 ,  H01L21/336

CPC分类号： H01L27/11556 ,  H01L27/11524 ,  H01L29/7889

摘要： According to one embodiment, a first trench extending in a first direction is formed in a stacked structure in which a plurality of spacer films and a plurality of channel semiconductor films are alternately stacked. A first space is formed by forming a recess in the channel semiconductor films from the first trench. A tunnel dielectric film is formed in the first space, and the first space is further filled with a floating gate electrode film. Second trenches that divide the stacked structure at predetermined interval in the first direction are formed so as to divide the floating gate electrode film between memory cells adjacent to each other in the first direction but not to divide the channel semiconductor films.

摘要翻译： 根据一个实施例，沿着第一方向延伸的第一沟槽以堆叠结构形成，其中多个隔离膜和多个沟道半导体膜交替堆叠。 通过在沟道半导体膜中形成来自第一沟槽的凹部来形成第一空间。 在第一空间中形成隧道电介质膜，并且第一空间进一步填充浮栅电极膜。 形成在第一方向上以预定间隔划分堆叠结构的第二沟槽，以便在第一方向上彼此相邻的存储单元之间划分浮栅电极膜，但不划分沟道半导体膜。