公开(公告)号：US20120016949A1

公开(公告)日：2012-01-19

申请号：US13258866

申请日：2010-03-15

申请人： Junichi Higuchi ,  Youichi Hidaka ,  Takashi Yoshikawa

发明人： Junichi Higuchi ,  Youichi Hidaka ,  Takashi Yoshikawa

IPC分类号： G06F15/16 ,  G06F15/167

CPC分类号： H04L67/1002

摘要： A distributed processing system which distributes a load of a request from a client without being restricted by a processing status and processing performance of transfer processing means is provided:A distributed processing system includes: processing means for processing a request from request means and generating a reply; a switch connected to the processing means; memory means connected to the switch; and an interface, connected to a network, the request means being connected to, and to the switch, for transferring the request from the request means to the memory means and for transferring the reply to the request means, wherein the memory means comprises: first control means for determining whether State management is required for the transferred request; first storage means for storing a request that requires the State management; and second storage means for storing a request that does not require the State management, the first control means eliminates the request stored in the first or the second storage means, based on an instruction from the processing means, and the processing means comprises second control means for detecting a load, reading out the request stored in the first or the second storage means according to the load, and outputting the generated reply to the interface.

摘要翻译： 提供了一种分布式处理系统，其分配来自客户端的请求的负载而不受处理状态的限制和传送处理装置的处理性能的限制。分布式处理系统包括：处理装置，用于处理来自请求装置的请求并产生回复 ; 连接到处理装置的开关; 连接到开关的存储器装置; 以及连接到网络的接口，所述请求装置连接到交换机，用于将请求从请求装置传送到存储器装置，并将答复传送到请求装置，其中存储装置包括：第一 用于确定所转移的请求是否需要状态管理的控制装置; 用于存储需要状态管理的请求的第一存储装置; 以及第二存储装置，用于存储不需要状态管理的请求，第一控制装置根据来自处理装置的指令消除存储在第一或第二存储装置中的请求，并且处理装置包括第二控制装置 用于检测负载，根据负载读出存储在第一或第二存储装置中的请求，并将生成的回复输出到接口。

公开(公告)号：US08635496B2

公开(公告)日：2014-01-21

申请号：US13057365

申请日：2009-08-04

申请人： Youichi Hidaka ,  Takashi Yoshikawa ,  Junichi Higuchi

发明人： Youichi Hidaka ,  Takashi Yoshikawa ,  Junichi Higuchi

IPC分类号： G06F11/00

CPC分类号： G06F11/079 ,  G06F11/0706

摘要： A trouble analysis apparatus is provided which includes: a system topology storing portion; an error detection information receiving portion which collects error detection information; and a trouble source determination portion which, based on both the error detection information collected by the error detection information receiving portion and system topology information stored in the system topology information storing portion, determines a trouble source functional element that is presumed as a functional element which is a source of a system trouble. Links included in the system topology information have information indicating spreading directions of error operations between the functional elements when trouble occurs. When the trouble source detection portion receives the error detection information with regard to multiple error functional elements, the trouble source determination portion sequentially selects one of the multiple error functional elements. The trouble source detection portion determines whether or not directions from the selected error functional element to other error functional elements conform to the spreading directions included in the system topology information. The trouble source determination portion determines the selected error functional element as the trouble source functional element when the spreading directions are conformable.

摘要翻译： 提供一种故障分析装置，包括：系统拓扑存储部; 错误检测信息接收部分，其收集错误检测信息; 以及故障源确定部，其基于由所述错误检测信息接收部收集的所述错误检测信息和存储在所述系统拓扑信息存储部中的系统拓扑信息，确定被认为是功能元素的故障源功能元件， 是系统麻烦的根源。 包括在系统拓扑信息中的链接具有指示当故障发生时功能元件之间的错误操作的扩展方向的信息。 当故障源检测部分接收关于多个错误功能元件的错误检测信息时，故障源确定部分依次选择多个误差功能元件中的一个。 故障源检测部分确定从所选择的误差功能元件到其他误差功能元件的方向是否符合包括在系统拓扑信息中的扩展方向。 当扩散方向一致时，故障源确定部分将所选择的误差功能元件确定为故障源功能元件。

公开(公告)号：US20110213902A1

公开(公告)日：2011-09-01

申请号：US13062255

申请日：2009-07-14

申请人： Youichi Hidaka ,  Junichi Higuchi ,  Takashi Yoshikawa

发明人： Youichi Hidaka ,  Junichi Higuchi ,  Takashi Yoshikawa

IPC分类号： G06F13/14

CPC分类号： G06F11/2043 ,  G06F11/2038 ,  G06F11/2097 ,  H04L69/32

摘要： An information processing system includes a plurality of processors for executing processing according to a predetermined processing request sent from a different device; a switching device for performing data transfer between the individual processors and the different device; and a storage device which is connected to the switching device and enables data transfer to and from the individual processors. At least one of the processors includes a processing request storing unit for storing processing request data sent from the different device to the processor, into the storage device by data transfer. At least another one of the processors includes a processing request reading unit for reading the processing request data stored in the storage device from the storage device by data transfer.

摘要翻译： 信息处理系统包括：多个处理器，用于根据从不同设备发送的预定处理请求执行处理; 用于在各处理器和不同装置之间执行数据传送的切换装置; 以及存储装置，其连接到所述开关装置，并且能够进行到各个处理器的数据传送。 至少一个处理器包括处理请求存储单元，用于通过数据传送将从不同设备发送到处理器的处理请求数据存储到存储设备中。 至少另一个处理器包括处理请求读取单元，用于通过数据传送从存储装置读取存储在存储装置中的处理请求数据。

公开(公告)号：US08417865B2

公开(公告)日：2013-04-09

申请号：US13469335

申请日：2012-05-11

申请人： Junichi Higuchi ,  Youichi Hidaka ,  Jun Suzuki ,  Atsushi Iwata

发明人： Junichi Higuchi ,  Youichi Hidaka ,  Jun Suzuki ,  Atsushi Iwata

IPC分类号： H04L12/407

CPC分类号： G06F13/4027 ,  G06F11/2017

摘要： An I/O equipment sharing system includes CPUs, a plurality of route complexes coupled to the CPUs, upstream PCI Express-bridges coupled to the route complexes, downstream PCI Express-bridges coupled to the upstream PCI Express-bridges through a network, and I/O equipment coupled to the downstream PCI Express-bridges. In the above configuration, the I/O equipment are shared between the CPUs using the identifiers of the network (for example, Ethernet VLAN IDs), the identifiers are set so that they do not overlap between the respective CPUs and necessary I/O equipment is set to a set identifier. Further, an identifier is set to a plurality of the same I/O equipment required by the respective CPUs.

摘要翻译： I / O设备共享系统包括CPU，耦合到CPU的多个路由复合体，耦合到路由复合体的上游PCI Express桥，通过网络耦合到上游PCI Express桥的下游PCI Express桥，以及I / O设备耦合到下游PCI Express桥。 在上述配置中，使用网络的标识符（例如，以太网VLAN ID）在CPU之间共享I / O设备，这些标识符被设置为使得它们在相应的CPU和必要的I / O设备之间不重叠 被设置为一个集合标识符。 此外，将标识符设置为由相应CPU所需的多个相同的I / O设备。

公开(公告)号：US08412875B2

公开(公告)日：2013-04-02

申请号：US13037999

申请日：2011-03-01

申请人： Jun Suzuki ,  Youichi Hidaka ,  Junichi Higuchi

发明人： Jun Suzuki ,  Youichi Hidaka ,  Junichi Higuchi

IPC分类号： G06F13/36

CPC分类号： G06F13/4022

摘要： A network system that is part of a main system includes: a first PCI express-network bridge with a first control unit and a first PCI express adapter terminating a first PCI express bus; and a second PCI express-network bridge connected to the first PCI express-network bridge through a network. The second PCI express-network bridge includes a second control unit and a second PCI express adapter terminating a second PCI express bus, wherein the first control unit detects a destination of a packet sent from the first PCI express adapter, searches a physical address of the destination from a packet encapsulating table, and encapsulates the packet in a frame so that the frame includes the physical address, and wherein the second control unit removes the encapsulation tagged to the packet, and transfers the packet to the destination through the second PCI express bus by referring to a PCI express configuration register.

摘要翻译： 作为主系统的一部分的网络系统包括：具有第一控制单元的第一PCI快速网桥和终止第一PCI Express总线的第一PCI Express适配器; 以及通过网络连接到第一PCI快速网络桥的第二PCI快速网络桥。 第二PCI Express网络桥包括第二控制单元和终止第二PCI Express总线的第二PCI Express适配器，其中第一控制单元检测从第一PCI Express适配器发送的分组的目的地，搜索第一PCI Express网络的物理地址 来自分组封装表的目的地，并且将分组封装在帧中，使得帧包括物理地址，并且其中第二控制单元去除标签到分组的封装，并且通过第二PCI Express总线将分组传送到目的地 通过参考PCI Express配置寄存器。

公开(公告)号：US20080040526A1

公开(公告)日：2008-02-14

申请号：US11836357

申请日：2007-08-09

申请人： Jun Suzuki ,  Youichi Hidaka ,  Junichi Higuchi ,  Atsushi Iwata

发明人： Jun Suzuki ,  Youichi Hidaka ,  Junichi Higuchi ,  Atsushi Iwata

IPC分类号： G06F13/00

CPC分类号： G06F13/4081 ,  G06F2213/0026

摘要： A virtual PCI Express device 1600 indicates the presence of a pseudo I/O device in a PCI Express initial configuration cycle to reserve a resource space for a device anticipated to be installed in the future, and when an I/O device 1400 is inserted into an unoccupied slot 1605, a virtual PCI Express device control logic 1602 notifies a downstream PCI-PCI bridge 1504 via a hot-plugging control line 1601, and the downstream PCI-PCI bridge 1504 generates an interrupt to a CPU 1100 to notify it of insertion of the I/O device 1400 in conformance with the procedure for hot plugging defined by the PCI-SIG Standards, and configuration software 1000 invoked configures the inserted I/O device 1400.

摘要翻译： 虚拟PCI Express设备1600指示在PCI Express初始配置周期中存在伪I / O设备以为将来预期安装的设备预留资源空间，并且当将I / O设备1400插入时 未占用的时隙1605，虚拟PCI Express设备控制逻辑1602经由热插拔控制线1601通知下游PCI-PCI桥1504，并且下游PCI-PCI桥1504向CPU 1100产生中断以通知其插入 的I / O设备1400符合由PCI-SIG标准定义的热插拔程序，并且配置软件1000被调用配置所插入的I / O设备1400。

公开(公告)号：US20070198763A1

公开(公告)日：2007-08-23

申请号：US11707084

申请日：2007-02-16

申请人： Jun Suzuki ,  Youichi Hidaka ,  Junichi Higuchi

发明人： Jun Suzuki ,  Youichi Hidaka ,  Junichi Higuchi

IPC分类号： G06F13/00

CPC分类号： G06F13/4022

摘要： A PCI Express switch which connects a plurality of peripheral devices to an arbitrary one of a plurality of CPUs through an Ethernet is constituted by a plurality of upstream and downstream PCI Express-network bridges, an Ethernet switch, and a system manager. Each of the upstream and downstream PCI Express-network bridges includes a PCI Express adapter which terminates a link of a PCI Express bus, a network adapter which terminates a link to the Ethernet switch, and a control unit which encapsulates a TLP in a frame, the destination of which is a MAC address of a bridge to which the destination is connected to transmit and receive the frame. Because the switch according to the present invention comprising a plurality of upstream PCI Express-network bridges and a plurality of downstream PCI Express-network bridges connected to the plurality of upstream PCI Express network bridges through a network is equivalent to a conventional PCI Express switch, it is needless to change a conventional PCI software.

摘要翻译： 通过以太网将多个外围设备连接到多个CPU中的任意一个的PCI Express交换机由多个上游和下游PCI Express网络桥，以太网交换机和系统管理器构成。 上游和下游PCI Express网络桥接器中的每一个包括PCI Express适配器，其终止PCI Express总线的链路，终止到以太网交换机的链路的网络适配器以及将TLP封装在帧中的控制单元， 其目的地是目的地与之连接以发送和接收帧的网桥的MAC地址。 因为包括通过网络连接到多个上游PCI Express网桥的多个上游PCI Express网络桥和多个下游PCI Express网桥的根据本发明的交换机等同于传统的PCI Express交换机， 不用改变传统的PCI软件。

公开(公告)号：US08200880B2

公开(公告)日：2012-06-12

申请号：US11857846

申请日：2007-09-19

申请人： Junichi Higuchi ,  Youichi Hidaka ,  Jun Suzuki ,  Atsushi Iwata

发明人： Junichi Higuchi ,  Youichi Hidaka ,  Jun Suzuki ,  Atsushi Iwata

IPC分类号： H04L12/407

CPC分类号： G06F13/4027 ,  G06F11/2017

摘要： An I/O equipment sharing system includes CPUs, a plurality of route complexes coupled to the CPUs, upstream PCI Express-bridges coupled to the route complexes, downstream PCI Express-bridges coupled to the upstream PCI Express-bridges through a network, and I/O equipment coupled to the downstream PCI Express-bridges. In the above configuration, the I/O equipment are shared between the CPUs using the identifiers of the network (for example, Ethernet VLAN IDs), the identifiers are set so that they do not overlap between the respective CPUs and necessary I/O equipment is set to a set identifier. Further, an identifier is set to a plurality of the same I/O equipment required by the respective CPUs.

摘要翻译： I / O设备共享系统包括CPU，耦合到CPU的多个路由复合体，耦合到路由复合体的上游PCI Express桥，通过网络耦合到上游PCI Express桥的下游PCI Express桥，以及I / O设备耦合到下游PCI Express桥。 在上述配置中，使用网络的标识符（例如，以太网VLAN ID）在CPU之间共享I / O设备，这些标识符被设置为使得它们在相应的CPU和必要的I / O设备之间不重叠 被设置为一个集合标识符。 此外，将标识符设置为由相应CPU所需的多个相同的I / O设备。

公开(公告)号：US07917681B2

公开(公告)日：2011-03-29

申请号：US11707084

申请日：2007-02-16

申请人： Jun Suzuki ,  Youichi Hidaka ,  Junichi Higuchi

发明人： Jun Suzuki ,  Youichi Hidaka ,  Junichi Higuchi

IPC分类号： G06F13/36

CPC分类号： G06F13/4022

摘要： A PCI Express switch which connects a plurality of peripheral devices to an arbitrary one of a plurality of CPUs through an Ethernet is constituted by a plurality of upstream and downstream PCI Express-network bridges, an Ethernet switch, and a system manager. Each of the upstream and downstream PCI Express-network bridges includes a PCI Express adapter which terminates a link of a PCI Express bus, a network adapter which terminates a link to the Ethernet switch, and a control unit which encapsulates a TLP in a frame, the destination of which is a MAC address of a bridge to which the destination is connected to transmit and receive the frame. Because the switch according to the present invention comprising a plurality of upstream PCI Express-network bridges and a plurality of downstream PCI Express-network bridges connected to the plurality of upstream PCI Express network bridges through a network is equivalent to a conventional PCI Express switch, it is needless to change a conventional PCI software.

摘要翻译： 通过以太网将多个外围设备连接到多个CPU中的任意一个的PCI Express交换机由多个上游和下游PCI Express网络桥，以太网交换机和系统管理器构成。 上游和下游PCI Express网络桥接器中的每一个包括PCI Express适配器，其终止PCI Express总线的链路，终止到以太网交换机的链路的网络适配器以及将TLP封装在帧中的控制单元， 其目的地是目的地与之连接以发送和接收帧的网桥的MAC地址。 因为包括通过网络连接到多个上游PCI Express网桥的多个上游PCI Express网络桥和多个下游PCI Express网桥的根据本发明的交换机等同于传统的PCI Express交换机， 不用改变传统的PCI软件。

公开(公告)号：US07877521B2

公开(公告)日：2011-01-25

申请号：US11836357

申请日：2007-08-09

申请人： Jun Suzuki ,  Youichi Hidaka ,  Junichi Higuchi ,  Atsushi Iwata

发明人： Jun Suzuki ,  Youichi Hidaka ,  Junichi Higuchi ,  Atsushi Iwata

IPC分类号： G06F3/00

CPC分类号： G06F13/4081 ,  G06F2213/0026

摘要： A virtual PCI Express device 1600 indicates the presence of a pseudo I/O device in a PCI Express initial configuration cycle to reserve a resource space for a device anticipated to be installed in the future, and when an I/O device 1400 is inserted into an unoccupied slot 1605, a virtual PCI Express device control logic 1602 notifies a downstream PCI-PCI bridge 1504 via a hot-plugging control line 1601, and the downstream PCI-PCI bridge 1504 generates an interrupt to a CPU 1100 to notify it of insertion of the I/O device 1400 in conformance with the procedure for hot plugging defined by the PCI-SIG Standards, and configuration software 1000 invoked configures the inserted I/O device 1400.

摘要翻译： 虚拟PCI Express设备1600指示在PCI Express初始配置周期中存在伪I / O设备以为将来预期安装的设备预留资源空间，并且当将I / O设备1400插入时 未占用的时隙1605，虚拟PCI Express设备控制逻辑1602经由热插拔控制线1601通知下游PCI-PCI桥1504，并且下游PCI-PCI桥1504向CPU 1100产生中断以通知其插入 的I / O设备1400符合由PCI-SIG标准定义的热插拔程序，并且配置软件1000被调用配置所插入的I / O设备1400。