摘要:
A light emitting diode circuit includes a chip and a light emitting diode. The chip includes a current control unit that is used for controlling a driving current flowing through a path. The light emitting diode is positioned outside of the chip and is coupled to the path. The light emitting diode generates a light source according to the driving current. The light emitting diode circuit can directly control the current value of a driving current flowing through the light emitting diode. In this way, the circuit design is simplified and the production cost of the electronic product is reduced.
摘要:
The invention discloses an automatic voltage control circuit for controlling a power supply unit to adjust a supply voltage provided by the power supply unit. The automatic voltage control circuit includes an oscillating unit, a frequency-comparing unit, and a control unit. The oscillating unit generates an oscillating signal. The frequency-comparing unit compares the oscillating frequency of the oscillating signal with at least one predetermined threshold frequency. The control unit controls the power supply unit to adjust the supply voltage according to the comparing result generated by the frequency-comparing unit.
摘要:
A method applied to a wired network including a first network device and a second network device is disclosed. The first and second network devices each include a first set of connection ends and a second set of connection ends. Firstly, the first network device transmits a specific signal pattern through its first set and second set of connection ends. Then, the first network device detects whether a signal is received at its first set and second set of connection ends. If it is determined that a signal is not received at the first set connection ends while a signal is received at the second set connection ends, the first network device determines that its second set of connection ends is not correctly coupled to the second set of connection ends of the second network device.
摘要:
The present invention provides an configuration setting device of integrated circuit and the configuration setting method thereof, in which the configuration setting device comprises a signal receiving terminal, a voltage output unit coupled to the signal receiving terminal, and a detector coupled to the signal receiving terminal. The signal receiving terminal is used to receive the input signal at the outer of the integrated circuit, and the voltage output unit generated at the inner of the integrated circuit is used to output a voltage signal based on the enable signal, and the detector is used to detect a level at the signal receiving terminal to output a configuration signal; wherein, the signal level generated at the signal receiving terminal is determined by the input signal and the voltage signal.
摘要:
A deinterleaving device includes a memory space, the memory space being divided into a plurality of N segments with different lengths respectively. A method of accessing data in a deinterleaving device, the method including performing the following steps during a first time cycle: reading first read data from a first address of a first segment; reading second read data from a first address of a second segment, and writing first write data into the first address of the second segment; reading third read data from a first address of a third segment, and writing second write data into the first address of the third segment; repeating the above reading and writing steps until reading Nth read data from a first address of an Nth segment, and writing N−1th write data into the first address of the Nth segment; writing Nth write data into the first address of the first segment.
摘要:
A deinterleaving device includes a memory space, the memory space being divided into a plurality of N segments with different lengths respectively. A method of accessing data in a deinterleaving device, the method including performing the following steps during a first time cycle: reading first read data from a first address of a first segment; reading second read data from a first address of a second segment, and writing first write data into the first address of the second segment; reading third read data from a first address of a third segment, and writing second write data into the first address of the third segment; repeating the above reading and writing steps until reading Nth read data from a first address of an Nth segment, and writing N−1th write data into the first address of the Nth segment; writing Nth write data into the first address of the first segment.
摘要:
A network system with wake-up on LAN (WOL) mechanism and a wake-up on LAN method are disclosed. The network system includes: a first network device in a first local area network; a second network device in a second local area network, wherein the first local area network and the second local area network are different; and, a match server in a wide area network, wherein the first network device and the second network device perform data transmission through the match server.