公开(公告)号：US12250891B2

公开(公告)日：2025-03-11

申请号：US18600826

申请日：2024-03-11

Applicant: Microchip Technology Incorporated

Inventor： Yaojian Leng

IPC: H10N70/00 ,  H10N70/20

Abstract: Resistive random access memory (RRAM) cells, for example conductive bridging random access memory (CBRAM) cells and oxygen vacancy-based RRAM (OxRRAM) cells are provided. An RRAM cell may include a metal-insulator-metal (MIM) structure formed between adjacent metal interconnect layers or between a silicided active layer (e.g., including MOSFET devices) and a first metal interconnect layer. The MIM structure of the RRAM cell may be formed by a damascene process including forming a tub opening in a dielectric region, forming a cup-shaped bottom electrode in the tub opening, forming a cup-shaped insulator in an interior opening defined by the cup-shaped bottom electrode, and forming a top electrode in an interior opening defined by the cup-shaped insulator. The cup-shaped bottom electrode, or a component thereof (in the case of a multi-layer bottom electrode) may be formed concurrently with interconnect vias, e.g., by deposition of tungsten or other conformal metal.

公开(公告)号：US12245439B2

公开(公告)日：2025-03-04

申请号：US17744881

申请日：2022-05-16

Applicant: Microchip Technology Incorporated

Inventor： Yaojian Leng

IPC: H01L49/02 ,  H01L21/768 ,  H01L23/522 ,  H10D1/00 ,  H10D1/68

Abstract: A metal-insulator-metal (MIM) capacitor includes a bottom electrode cup, an insulator, and a top electrode. The bottom electrode cup includes a laterally-extending bottom electrode cup base and a bottom electrode cup sidewall extending upwardly from the laterally-extending bottom electrode cup base. The insulator includes an insulator cup formed in an opening defined by the bottom electrode cup, and an insulator flange extending laterally outwardly from the insulator cup sidewall and extending laterally over an upper surface of the bottom electrode cup sidewall. The top electrode is formed in an opening defined by the insulator cup. The top electrode is insulated from the upper surface of the bottom electrode cup sidewall by the insulator flange.

公开(公告)号：US12015052B2

公开(公告)日：2024-06-18

申请号：US17747302

申请日：2022-05-18

Applicant: Microchip Technology Incorporated

Inventor： Yaojian Leng

IPC: H01L21/768 ,  H01L23/522 ,  H01L49/02

CPC classification number: H01L28/91 ,  H01L21/76838 ,  H01L23/5226 ,  H01L28/92

Abstract: A metal-insulator-metal (MIM) capacitor includes a bottom electrode cup, an insulator, and a top electrode. The bottom electrode cup includes a laterally-extending bottom electrode cup base and a bottom electrode cup sidewall extending upwardly from the laterally-extending bottom electrode cup base. The insulator includes an insulator cup formed in an opening defined by the bottom electrode cup, and a rounded insulator flange extending laterally outwardly and curving upwardly from the insulator cup, the rounded insulator flange covering an upper surface of the bottom electrode cup sidewall. The top electrode is formed in an opening defined by the insulator cup. The top electrode is insulated from the upper surface of the bottom electrode cup sidewall by the rounded insulator flange.

公开(公告)号：US20240170529A1

公开(公告)日：2024-05-23

申请号：US18162775

申请日：2023-02-01

Applicant: Microchip Technology Incorporated

Inventor： Yaojian Leng

IPC: H01L21/02

CPC classification number: H01L28/60

Abstract: A method for making a metal-insulator-metal (MIM) capacitors by etching a dielectric layer to form a via or contact hole, a tub, and a trench in the dielectric layer; depositing conformal metal in the via or contact hole, the tub, and the trench, wherein deposited conformal metal forms a via or contact in the via or contact hole; depositing a bottom electrode metal in the tub to form a bottom electrode of a metal-to-metal (MIM) capacitor; removing bottom electrode metal from the bottom electrode to form a dish-shape upper surface; depositing an insulator material on the bottom electrode to form an insulator layer of the MIM capacitor; and depositing a top electrode metal on the insulator layer to form a top electrode of the MIM capacitor.

公开(公告)号：US20240087886A1

公开(公告)日：2024-03-14

申请号：US18070748

申请日：2022-11-29

Applicant: Microchip Technology Incorporated

Inventor： Yaojian Leng

IPC: H01L21/02 ,  H01L21/3205 ,  H01L21/321 ,  H01L21/3213

CPC classification number: H01L21/02343 ,  H01L21/02164 ,  H01L21/02274 ,  H01L21/32051 ,  H01L21/3212 ,  H01L21/32133

Abstract: A method of forming a partially silicided element is provided. A silicided structure including a silicide layer on a base structure is formed. A dielectric region is formed over the silicided structure. The dielectric region is etched to form a contact opening exposing a first area of the silicide layer and a tub opening exposing a second area of the silicide layer. A conformal metal is deposited to (a) fill the contact opening to define a contact and (b) form a cup-shaped metal structure in the tub opening. Another etch is performed to remove the cup-shaped metal structure in the tub opening, to remove the underlying silicide layer second area and to expose an underlying area of the base structure, wherein the silicide layer first area remains intact. The base structure with the intact silicide layer first area and removed silicide layer second area defines the partially silicided element.

公开(公告)号：US20230268269A1

公开(公告)日：2023-08-24

申请号：US18140198

申请日：2023-04-27

Applicant: Microchip Technology Incorporated

Inventor： Yaojian Leng ,  Justin Sato

IPC: H01L23/522 ,  H01L23/532 ,  H01F27/32 ,  H01F27/28

CPC classification number: H01L23/5227 ,  H01L23/53238 ,  H01L23/53223 ,  H01F27/32 ,  H01L28/10 ,  H01F27/2823 ,  H01L23/5329

Abstract: A low-resistance thick-wire integrated inductor may be formed in an integrated circuit (IC) device. The integrated inductor may include an elongated inductor wire defined by a metal layer stack including an upper metal layer, middle metal layer, and lower metal layer. The lower metal layer may be formed in a top copper interconnect layer, the upper metal layer may be formed in an aluminum bond pad layer, and the middle metal layer may comprise a copper tub region formed between the aluminum upper layer and copper lower layer. The wide copper region defining the middle layer of the metal layer stack may be formed concurrently with copper vias of interconnect structures in the IC device, e.g., by filling respective openings using copper electrochemical plating or other bottom-up fill process. The elongated inductor wire may be shaped in a spiral or other symmetrical or non-symmetrical shape.

公开(公告)号：US11729993B2

公开(公告)日：2023-08-15

申请号：US17409883

申请日：2021-08-24

Applicant: Microchip Technology Incorporated

Inventor： Yaojian Leng

IPC: H01L21/00 ,  H10B53/30 ,  H01L49/02

CPC classification number: H10B53/30 ,  H01L28/55 ,  H01L28/65 ,  H01L28/92

Abstract: Ferroelectric random access memory (FRAM) capacitors and methods of forming FRAM capacitors are provided. An FRAM capacitor may be formed between adjacent metal interconnect layers or between a silicided active layer (e.g., including MOSFET devices) and a first metal interconnect layer. The FRAM capacitor may be formed by a damascene process including forming a tub opening in a dielectric region, forming a cup-shaped bottom electrode, forming a cup-shaped ferroelectric element in an interior opening defined by the cup-shaped bottom electrode, and forming a top electrode in an interior opening defined by the cup-shaped ferroelectric element. The FRAM capacitor may form a component of an FRAM memory cell. For example, an FRAM memory cell may include one FRAM capacitor and one transistor (1T1C configuration) or two FRAM capacitors and two transistor (2T2C configuration).

公开(公告)号：US20230207614A1

公开(公告)日：2023-06-29

申请号：US17744881

申请日：2022-05-16

Applicant: Microchip Technology Incorporated

Inventor： Yaojian Leng

IPC: H01L49/02 ,  H01L21/768 ,  H01L23/522

CPC classification number: H01L28/87 ,  H01L21/76877 ,  H01L23/5223 ,  H01L23/5226

Abstract: A metal-insulator-metal (MIM) capacitor includes a bottom electrode cup, an insulator, and a top electrode. The bottom electrode cup includes a laterally-extending bottom electrode cup base and a bottom electrode cup sidewall extending upwardly from the laterally-extending bottom electrode cup base. The insulator includes an insulator cup formed in an opening defined by the bottom electrode cup, and an insulator flange extending laterally outwardly from the insulator cup sidewall and extending laterally over an upper surface of the bottom electrode cup sidewall. The top electrode is formed in an opening defined by the insulator cup. The top electrode is insulated from the upper surface of the bottom electrode cup sidewall by the insulator flange.

公开(公告)号：US20230082867A1

公开(公告)日：2023-03-16

申请号：US17516141

申请日：2021-11-01

Applicant: Microchip Technology Incorporated

Inventor： Yaojian Leng

IPC: H01L49/02 ,  H01L23/522

Abstract: A metal-insulator-metal (MIM) capacitor module is provided. The MIM capacitor module includes a bottom electrode base formed in a lower metal layer, a bottom electrode conductively coupled to the bottom electrode base, a planar insulator formed over the bottom electrode, and a top electrode formed in an upper metal layer over the insulator. The bottom electrode includes a cup-shaped bottom electrode component and a bottom electrode fill component formed in an interior opening defined by the cup-shaped bottom electrode component.

公开(公告)号：US20220336577A1

公开(公告)日：2022-10-20

申请号：US17379376

申请日：2021-07-19

Applicant: Microchip Technology Incorporated

Inventor： Yaojian Leng

IPC: H01L49/02 ,  H01L21/768

Abstract: A metal-insulator-metal (MIM) capacitor includes (a) a bottom electrode including (i) a bottom electrode plate and (ii) a bottom electrode cup formed from a conformal fill metal, (b) an insulator cup formed on the bottom electrode cup, (c) a top electrode formed in an opening defined by the insulator cup, and (d) a top electrode connection pad connected to the top electrode. The MIM capacitor may be formed concurrently with an interconnect structure including a lower interconnect element, an upper interconnect element, and interconnect via connected between the lower and upper interconnect elements. The bottom electrode plate and lower interconnect element may be formed in a lower metal layer, the top electrode connection pad and upper interconnect element may be formed in an upper metal layer, and the bottom electrode cup, insulator cup, top electrode, and interconnect vias may be formed between the lower and upper metal layers.