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21.
公开(公告)号:US10403349B2
公开(公告)日:2019-09-03
申请号:US16140281
申请日:2018-09-24
Applicant: Micron Technology, Inc.
Inventor: Eric Carman
IPC: G11C11/22
Abstract: Methods, systems, and devices for operating a ferroelectric memory cell or cells are described. Prior to writing a logic value to a ferroelectric memory cell, a digit line of a ferroelectric memory cell may be biased to a first voltage, and a cell plate of the ferroelectric memory cell may be biased to a second voltage. A magnitude of a difference between the first voltage and the second voltage may be greater than a magnitude of a write voltage for the first ferroelectric memory cell. The magnitude of the difference between the first voltage and the second voltage may decrease the time to reach a write voltage for the ferroelectric memory cell. Several example cell plate drivers are also disclosed.
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22.
公开(公告)号:US10083733B2
公开(公告)日:2018-09-25
申请号:US15689211
申请日:2017-08-29
Applicant: Micron Technology, Inc.
Inventor: Eric Carman
CPC classification number: G11C11/2275 , G11C11/221 , G11C11/2293
Abstract: Methods, systems, and devices for operating a ferroelectric memory cell or cells are described. Prior to writing a logic value to a ferroelectric memory cell, a digit line of a ferroelectric memory cell may be biased to a first voltage, and a cell plate of the ferroelectric memory cell may be biased to a second voltage. A magnitude of a difference between the first voltage and the second voltage may be greater than a magnitude of a write voltage for the first ferroelectric memory cell. The magnitude of the difference between the first voltage and the second voltage may decrease the time to reach a write voltage for the ferroelectric memory cell. Several example cell plate drivers are also disclosed.
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23.
公开(公告)号:US20170270992A1
公开(公告)日:2017-09-21
申请号:US15071991
申请日:2016-03-16
Applicant: Micron Technology, Inc.
Inventor: Eric Carman
IPC: G11C11/22
CPC classification number: G11C11/2275 , G11C11/221 , G11C11/2293
Abstract: Methods, systems, and devices for operating a ferroelectric memory cell or cells are described. Prior to writing a logic value to a ferroelectric memory cell, a digit line of a ferroelectric memory cell may be biased to a first voltage, and a cell plate of the ferroelectric memory cell may be biased to a second voltage. A magnitude of a difference between the first voltage and the second voltage may be greater than a magnitude of a write voltage for the first ferroelectric memory cell. The magnitude of the difference between the first voltage and the second voltage may decrease the time to reach a write voltage for the ferroelectric memory cell. Several example cell plate drivers are also disclosed.
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