公开(公告)号：US12114225B2

公开(公告)日：2024-10-08

申请号：US18211183

申请日：2023-06-16

申请人： Ivani, LLC

发明人： John Wootton ,  Matthew Wootton ,  Chris Nissman ,  Victoria Preston ,  Jonathan Clark ,  Justin McKinney ,  Claire Barnes

IPC分类号： H04W24/00 ,  G01V3/12 ,  G11C11/22 ,  H04B17/27 ,  H04B17/318 ,  H04B17/373 ,  H04L1/00 ,  H04L5/00 ,  H04W4/02 ,  H04W4/029 ,  H04W4/30 ,  H04W4/33 ,  H04W4/50 ,  H04W4/80 ,  H04W64/00 ,  G01V1/00

CPC分类号： H04W4/023 ,  G01V3/12 ,  G11C11/2257 ,  G11C11/2259 ,  G11C11/2273 ,  G11C11/2293 ,  G11C11/2297 ,  H04B17/27 ,  H04B17/318 ,  H04B17/373 ,  H04L1/0018 ,  H04L5/006 ,  H04W4/02 ,  H04W4/029 ,  H04W4/30 ,  H04W4/33 ,  H04W4/50 ,  H04W4/80 ,  H04W64/00 ,  G01V1/001 ,  G11C11/221

摘要： Systems and methods for detecting the presence of a body in a network without fiducial elements, using signal absorption, and signal forward and reflected backscatter of RF waves caused by the presence of a biological mass in a communications network.

公开(公告)号：US11910618B1

公开(公告)日：2024-02-20

申请号：US17654562

申请日：2022-03-11

申请人： Kepler Computing Inc.

发明人： Rajeev Kumar Dokania ,  Amrita Mathuriya ,  Debo Olaosebikan ,  Tanay Gosavi ,  Noriyuki Sato ,  Sasikanth Manipatruni

IPC分类号： H10B53/30 ,  G11C11/22 ,  H10B53/10

CPC分类号： H10B53/30 ,  G11C11/221 ,  G11C11/2255 ,  G11C11/2257 ,  G11C11/2273 ,  G11C11/2275 ,  G11C11/2293 ,  H10B53/10

摘要： A configuration for efficiently placing a group of capacitors with one terminal connected to a common node is described. The capacitors are stacked and folded along the common node. In a stack and fold configuration, devices are stacked vertically (directly or with a horizontal offset) with one terminal of the devices being shared to a common node, and further the capacitors are placed along both sides of the common node. The common node is a point of fold. In one example, the devices are capacitors. N number of capacitors can be divided in L number of stack layers such that there are N/L capacitors in each stacked layer. The N/L capacitors are shorted together with an electrode (e.g., bottom electrode). The electrode can be metal, a conducting oxide, or a combination of a conducting oxide and a barrier material. The capacitors can be planar, non-planar or replaced by memory elements.

公开(公告)号：US11880591B2

公开(公告)日：2024-01-23

申请号：US18056520

申请日：2022-11-17

申请人： Lodestar Licensing Group LLC

发明人： M. Ataul Karim

IPC分类号： G06F3/06 ,  G11C11/22 ,  G11C11/4076 ,  H03K3/356 ,  H03F3/45

CPC分类号： G06F3/0655 ,  G06F3/0604 ,  G06F3/0679 ,  G11C11/2293 ,  G11C11/4076 ,  H03F3/45179 ,  H03K3/356113 ,  G11C11/221

摘要： Methods, systems, and devices for feedback for multi-level signaling in a memory device are described. A receiver may use a modulation scheme to communicate information with a host device. The receiver may include a first circuit, a second circuit, a third circuit, and a fourth circuit. Each of the first circuit, the second circuit, the third circuit, and the fourth circuit may determine, for a respective clock phase, a voltage level of a signal modulated using the modulation scheme. The receiver may include a first feedback circuit, a second feedback circuit, a third feedback circuit, and a fourth feedback circuit. The first feedback circuit that may use information received from the first circuit at the first clock phase and modify the signal input into the second circuit for the second clock phase.

公开(公告)号：US20230377625A1

公开(公告)日：2023-11-23

申请号：US18030214

申请日：2021-10-12

申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

发明人： Takanori MATSUZAKI ,  Tatsuya ONUKI ,  Toshihiko SAITO

IPC分类号： G11C11/22 ,  H10B53/30 ,  H01L29/786

CPC分类号： G11C11/221 ,  H10B53/30 ,  H01L29/7869 ,  H01L28/55 ,  G11C11/2273 ,  G11C11/2275 ,  G11C11/2293 ,  G11C11/2257

摘要： A novel semiconductor device is provided. The semiconductor device includes a memory cell including a transistor and a capacitor that includes a ferroelectric; a word line; a bit line; and a plate line. A gate of the transistor is electrically connected to the word line. One of a source and a drain of the transistor is electrically connected to the bit line. The other of the source and the drain of the transistor is electrically connected to one electrode of the capacitor. The other electrode of the capacitor is electrically connected to the plate line. The semiconductor device has a function of supplying a potential that controls an on state or an off state of the transistor to the word line, a function of supplying a first potential or a second potential to the bit line, and a function of supplying a third potential, a fourth potential, or a fifth potential to the plate line.

公开(公告)号：US11670353B2

公开(公告)日：2023-06-06

申请号：US17187310

申请日：2021-02-26

申请人： Micron Technology, Inc.

发明人： Daniele Vimercati

IPC分类号： G11C11/22 ,  G11C11/56 ,  G11C13/00

CPC分类号： G11C11/2273 ,  G11C11/221 ,  G11C11/2275 ,  G11C11/2293 ,  G11C11/2297 ,  G11C13/004 ,  G11C11/5657

摘要： The present disclosure includes apparatuses, methods, and systems for current separation for memory sensing. An embodiment includes applying a sensing voltage to a memory cell having a ferroelectric material, and determining a data state of the memory cell by separating a first current output by the memory cell while the sensing voltage is being applied to the memory cell and a second current output by the memory cell while the sensing voltage is being applied to the memory cell, wherein the first current output by the memory cell corresponds to a first polarization state of the ferroelectric material of the memory cell and the second current output by the memory cell corresponds a second polarization state of the ferroelectric material of the memory cell.

公开(公告)号：US20180330791A1

公开(公告)日：2018-11-15

申请号：US15976315

申请日：2018-05-10

申请人： The Penn State Research Foundation

发明人： Xueqing Li ,  Sumitha George ,  John Sampson ,  Sumeet Gupta ,  Suman Datta ,  Vijaykrishnan Narayanan ,  Kaisheng Ma

IPC分类号： G11C14/00 ,  H01L29/78 ,  G11C13/00

CPC分类号： G11C14/0072 ,  G11C11/1675 ,  G11C11/1693 ,  G11C11/223 ,  G11C11/2275 ,  G11C11/2293 ,  G11C13/0002 ,  G11C13/0007 ,  G11C13/0061 ,  G11C13/0069 ,  G11C14/0054 ,  G11C14/0081 ,  G11C14/009 ,  H01L29/78391

摘要： Embodiments include nonvolatile a memory (NVM) device that can be configured for logic switching and/or digital computing. For example, embodiments of the NVM device can be configured as any one or combination of a memory cell, a D flip flop (DFF), a Backup and Restore circuit (B&R circuit), and/or a latch for a DFF. Any of the NVM devices can have a Fe field effect transistors (FeFET) configured to exploit the IDS−VG hysteresis of the steep switch at low voltage for logic memory synergy. The FeFET-based devices can be configured to include a wide hysteresis, a steep hysteresis edge, and high ratio between the two IDS states at VG=0.

公开(公告)号：US09966128B1

公开(公告)日：2018-05-08

申请号：US15463394

申请日：2017-03-20

申请人： GLOBALFOUNDRIES Inc.

发明人： Germain Bossu

IPC分类号： G11C14/00 ,  G11C11/22 ,  G11C5/06 ,  G11C5/14

CPC分类号： G11C11/2275 ,  G11C5/063 ,  G11C5/148 ,  G11C7/20 ,  G11C11/221 ,  G11C11/223 ,  G11C11/2273 ,  G11C11/2293 ,  G11C11/2297 ,  G11C11/412 ,  G11C14/0072

摘要： The present disclosure provides a storage cell or storage structure having a static RAM-like operational behavior while nevertheless providing non-volatile storage capability on a single bit basis. To this end, a non-volatile storage element, such as a ferroelectric transistor element, may be provided within an inverter structure so as to allow the storage of a logic state at any desired operational phase by increasing the voltage difference used for operating the inverter structure. In illustrative embodiments, the stored logic state may be re-established during a power-up event.

公开(公告)号：US09966127B2

公开(公告)日：2018-05-08

申请号：US15291711

申请日：2016-10-12

申请人： Micron Technology, Inc.

发明人： Ferdinando Bedeschi ,  Umberto Di Vincenzo

IPC分类号： G11C11/22

CPC分类号： G11C11/2259 ,  G11C11/221 ,  G11C11/2273 ,  G11C11/2275 ,  G11C11/2277 ,  G11C11/2293

摘要： Methods, systems, and devices are described for operating a memory array. A first voltage may be applied to a memory cell to activate a selection component of the memory cell prior to applying a second voltage to the memory cell. The second voltage may be applied to facilitate a sensing operation once the selection component is activated. The first voltage may be applied during a first portion of an access operation and may be used in determining a threshold voltage of the selection component. The subsequently applied second voltage may be applied during a second portion of the access operation and may have a magnitude associated with a preferred voltage for accessing a ferroelectric capacitor of the memory cell. In some cases, the second voltage has a greater rate of increase over time (e.g., a greater “ramp”) than the first voltage.

公开(公告)号：US20170366938A1

公开(公告)日：2017-12-21

申请号：US15674328

申请日：2017-08-10

申请人： Ivani, LLC

发明人： John Wootton ,  Matthew Wootton ,  Chris Nissman ,  Victoria Preston ,  Jonathan Clark ,  Justin McKinney ,  Claire Barnes ,  Xinyu Xiao ,  Zhecan Wang

IPC分类号： H04W4/02 ,  H04W4/04 ,  H04L5/00 ,  H04B17/318 ,  H04L1/00 ,  G01V3/12 ,  H04W64/00 ,  H04W4/00

CPC分类号： H04W4/023 ,  G01V1/001 ,  G01V3/12 ,  G11C11/221 ,  G11C11/2257 ,  G11C11/2259 ,  G11C11/2273 ,  G11C11/2293 ,  G11C11/2297 ,  H04B17/27 ,  H04B17/318 ,  H04L1/0018 ,  H04L5/006 ,  H04W4/30 ,  H04W4/33 ,  H04W4/80 ,  H04W64/00

摘要： Systems and methods for detecting the presence of a body in a network without fiducial elements, using signal absorption, and signal forward and reflected backscatter of radio frequency (RF) waves caused by the presence of a biological mass in a communications network.

公开(公告)号：US20170365322A1

公开(公告)日：2017-12-21

申请号：US15692994

申请日：2017-08-31

申请人： Micron Technology, Inc.

发明人： Christopher John Kawamura ,  Scott James Derner

IPC分类号： G11C11/22

CPC分类号： G11C11/2273 ,  G11C7/14 ,  G11C11/221 ,  G11C11/2293

摘要： Methods, systems, and devices for operating a ferroelectric memory cell or cells are described. A portion of charge of a memory cell may be captured and, for example, stored using a capacitor or intrinsic capacitance of the memory array that includes the memory cell. The memory cell may be recharged (e.g., re-written). The memory cell may then be read, and a voltage of the memory cell may be compared to a voltage resulting from the captured charge. A logic state of the memory cell may be determined based at least in part on the voltage comparison.