-
公开(公告)号:US11934319B2
公开(公告)日:2024-03-19
申请号:US18053685
申请日:2022-11-08
Applicant: Micron Technology, Inc.
Inventor: Samuel E. Bradshaw , Shivasankar Gunasekaran , Hongyu Wang , Justin M. Eno
IPC: G06F12/1009 , G06F3/06 , G06F9/50 , G06F12/1027
CPC classification number: G06F12/1009 , G06F3/0611 , G06F3/0656 , G06F3/0679 , G06F9/5016 , G06F12/1027
Abstract: A computer system includes physical memory devices of different types that store randomly-accessible data in a main memory of the computer system. In one approach, an operating system allocates memory from a namespace for use by an application. The namespace is a logical reference to physical memory devices in which physical addresses are defined. The namespace is bound to a memory type. In response to binding the namespace to the memory type, the operating system adjusts a page table to map a logical memory address in the namespace to a memory device of the memory type.
-
公开(公告)号:US20210149595A1
公开(公告)日:2021-05-20
申请号:US16688250
申请日:2019-11-19
Applicant: Micron Technology, Inc.
Inventor: Shivasankar Gunasekaran , Samuel E. Bradshaw , Justin M. Eno , Ameen D. Akel
IPC: G06F3/06 , G06F11/07 , G06F12/0873
Abstract: A memory sub-system configured to be responsive to a time to live requirement for load commands from a processor. For example, a load command issued by the processor (e.g., SoC) can include, or be associated with, an optional time to live parameter. The parameter requires that the data at the memory address be available within the time specified by the time to live parameter. When the requested data is currently in the lower speed memory (e.g., NAND flash) and not available in the higher speed memory (e.g., DRAM, NVRAM), the memory subsystem can determine that the data cannot be made available with the specified time and optionally skip the operations and return an error response immediately.
-
公开(公告)号:US10963396B1
公开(公告)日:2021-03-30
申请号:US16573535
申请日:2019-09-17
Applicant: Micron Technology, Inc.
Inventor: Samuel E. Bradshaw , Shivasankar Gunasekaran , Hongyu Wang , Justin M. Eno
IPC: G06F12/1009 , G06F12/1027 , G06F3/06 , G06F9/50
Abstract: A computer system includes physical memory devices of different types that store randomly-accessible data in a main memory of the computer system. In one approach, an operating system allocates memory from a namespace for use by an application. The namespace is a logical reference to physical memory devices in which physical addresses are defined. The namespace is bound to a memory type. In response to binding the namespace to the memory type, the operating system adjusts a page table to map a logical memory address in the namespace to a memory device of the memory type.
-
公开(公告)号:US20210081326A1
公开(公告)日:2021-03-18
申请号:US16573541
申请日:2019-09-17
Applicant: Micron Technology, Inc.
Inventor: Kenneth Marion Curewitz , Sean S. Eilert , Hongyu Wang , Samuel E. Bradshaw , Shivasankar Gunasekaran , Justin M. Eno , Shivam Swami
IPC: G06F12/1009 , G06F12/1027
Abstract: A computer system includes physical memory devices of different types that store randomly-accessible data in a main memory of the computer system. In one approach, data is stored in memory at one or more logical addresses allocated to an application by an operating system. The data is physically stored in a first memory device of a first memory type (e.g., NVRAM). The operating system determines an access pattern for the stored data. In response to determining the access pattern, the data is moved from the first memory device to a second memory device of a different memory type (e.g., DRAM).
-
公开(公告)号:US20210081121A1
公开(公告)日:2021-03-18
申请号:US16573490
申请日:2019-09-17
Applicant: Micron Technology, Inc.
Inventor: Kenneth Marion Curewitz , Shivasankar Gunasekaran , Ameen D. Akel , Hongyu Wang , Justin M. Eno , Shivam Swami , Samuel E. Bradshaw
IPC: G06F3/06 , G06F12/1027
Abstract: A computer system stores metadata that is used to identify physical memory devices that store randomly-accessible data for memory of the computer system. In one approach, access to memory in an address space is maintained by an operating system of the computer system. Stored metadata associates a first address range of the address space with a first memory device, and a second address range of the address space with a second memory device. The operating system manages processes running on the computer system by accessing the stored metadata. This management includes allocating memory based on the stored metadata so that data for a first process is stored in the first memory device, and data for a second process is stored in the second memory device.
-
公开(公告)号:US10922174B2
公开(公告)日:2021-02-16
申请号:US16406775
申请日:2019-05-08
Applicant: Micron Technology, Inc.
Inventor: Justin M. Eno , Samuel E. Bradshaw
Abstract: A memory device can include three-dimensional memory entities each including a plurality of two-dimensional memory entities. A controller can read data from the memory at a first resolution and collect error rate information from the memory at a second resolution including a portion of a two-dimensional memory entity. The controller can determine a quantity of two-dimensional memory entities that have a greater error rate than a remainder of the two-dimensional memory entities based on the error rate information. The controller can determine a quantity of portions of three-dimensional memory entities that have a greater error rate than a remainder of the portions of three-dimensional memory entities based on the error rate information excluding error rate information for portions of the two-dimensional memory entities associated with the quantity of two-dimensional memory entities. The controller can cull the quantity of the two-dimensional memory entities and the quantity of the three-dimensional memory entities.
-
公开(公告)号:US12066951B2
公开(公告)日:2024-08-20
申请号:US17964720
申请日:2022-10-12
Applicant: Micron Technology, Inc.
Inventor: Samuel E. Bradshaw , Justin M. Eno , Sean Stephen Eilert , Shivasankar Gunasekaran , Hongyu Wang , Shivam Swami
IPC: G06F12/1009 , G06F12/1027
CPC classification number: G06F12/1009 , G06F12/1027 , G06F2212/657 , G06F2212/68
Abstract: A computer system includes physical memory devices of different types that store randomly-accessible data in memory of the computer system. In one approach, access to memory in an address space is maintained by an operating system of the computer system. A virtual page is associated with a first memory type. A page table entry is generated to map a virtual address of the virtual page to a physical address in a first memory device of the first memory type. The page table entry is used by a memory management unit to store the virtual page at the physical address.
-
公开(公告)号:US11868268B2
公开(公告)日:2024-01-09
申请号:US17665823
申请日:2022-02-07
Applicant: Micron Technology, Inc.
Inventor: Kenneth Marion Curewitz , Sean S. Eilert , Hongyu Wang , Samuel E. Bradshaw , Shivasankar Gunasekaran , Justin M. Eno , Shivam Swami
IPC: G06F12/10 , G06F12/1009 , G06F12/1027
CPC classification number: G06F12/1009 , G06F12/1027 , G06F2212/657 , G06F2212/68
Abstract: A computer system includes physical memory devices of different types that store randomly-accessible data in a main memory of the computer system. In one approach, data is stored in memory at one or more logical addresses allocated to an application by an operating system. The data is physically stored in a first memory device of a first memory type (e.g., NVRAM). The operating system determines an access pattern for the stored data. In response to determining the access pattern, the data is moved from the first memory device to a second memory device of a different memory type (e.g., DRAM).
-
公开(公告)号:US20230080030A1
公开(公告)日:2023-03-16
申请号:US18053685
申请日:2022-11-08
Applicant: Micron Technology, Inc.
Inventor: Samuel E. Bradshaw , Shivasankar Gunasekaran , Hongyu Wang , Justin M. Eno
IPC: G06F12/1009 , G06F12/1027 , G06F3/06 , G06F9/50
Abstract: A computer system includes physical memory devices of different types that store randomly-accessible data in a main memory of the computer system. In one approach, an operating system allocates memory from a namespace for use by an application. The namespace is a logical reference to physical memory devices in which physical addresses are defined. The namespace is bound to a memory type. In response to binding the namespace to the memory type, the operating system adjusts a page table to map a logical memory address in the namespace to a memory device of the memory type.
-
公开(公告)号:US20230033549A1
公开(公告)日:2023-02-02
申请号:US17964720
申请日:2022-10-12
Applicant: Micron Technology, Inc.
Inventor: Samuel E. Bradshaw , Justin M. Eno , Sean Stephen Eilert , Shivasankar Gunasekaran , Hongyu Wang , Shivam Swami
IPC: G06F12/1009 , G06F12/1027
Abstract: A computer system includes physical memory devices of different types that store randomly-accessible data in memory of the computer system. In one approach, access to memory in an address space is maintained by an operating system of the computer system. A virtual page is associated with a first memory type. A page table entry is generated to map a virtual address of the virtual page to a physical address in a first memory device of the first memory type. The page table entry is used by a memory management unit to store the virtual page at the physical address.
-
-
-
-
-
-
-
-
-