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    Data recovery system for memory devices
    1.
    发明授权
    Data recovery system for memory devices 有权

    公开(公告)号：US12271262B2

    公开(公告)日：2025-04-08

    申请号：US17858579

    申请日：2022-07-06

    Applicant: Micron Technology, Inc.

    Inventor： Richard Edward Fackenthal ,  Sean Stephen Eilert

    IPC: G06F11/10 ,  G06F12/0804

    Abstract: Systems, methods, and apparatus related to data recovery in memory devices. In one approach, a memory device encodes stored data. The memory device reads a codeword from a storage media and determines that a number errors in the codeword exceeds an error correction capability of the memory device. The errors are due, for example, to one or more stuck bits. In response to this determination, one or more data patterns are written to the storage media at the same address from which the codeword is read. The data patterns are read to identify bit locations of the stuck bits. The identified locations are used to correct bit errors of the read codeword that correspond to the identified locations. The corrected code word is sent to a host device (e.g., which requested data from the memory device using a read command).

    MEMORY CHIP HAVING AN INTEGRATED DATA MOVER
    2.
    发明申请
    MEMORY CHIP HAVING AN INTEGRATED DATA MOVER 有权

    公开(公告)号：US20240427708A1

    公开(公告)日：2024-12-26

    申请号：US18828657

    申请日：2024-09-09

    Applicant: Micron Technology, Inc.

    Inventor： Samuel E. Bradshaw ,  Shivam Swami ,  Sean Stephen Eilert ,  Justin M. Eno ,  Ameen D. Akel

    IPC: G06F13/10 ,  G06F3/06 ,  G06F12/0802 ,  G06F13/12

    Abstract: A memory chip having a first set of pins configured to allow the memory chip to be coupled to a first microchip or device via first wiring. The memory chip also having a second set of pins configured to allow the memory chip to be coupled to a second microchip or device via second wiring that is separate from the first wiring. The memory chip also having a data mover configured to facilitate access to the second microchip or device, via the second set of pins, to read data from the second microchip or device and write data to the second microchip or device. Also, a system having the memory chip, the first microchip or device, and the second microchip or device.

    VERSIONING DATA STORED ON MEMORY DEVICE
    5.
    发明申请
    VERSIONING DATA STORED ON MEMORY DEVICE 有权

    公开(公告)号：US20220129196A1

    公开(公告)日：2022-04-28

    申请号：US17082947

    申请日：2020-10-28

    Applicant: Micron Technology, Inc

    Inventor： David Andrew Roberts ,  Sean Stephen Eilert

    IPC: G06F3/06 ,  G06F12/06

    Abstract: Various embodiments enable versioning of data stored on a memory device, where the versioning allows the memory device to maintain different versions of data within a set of physical memory locations (e.g., a row) of the memory device. In particular, some embodiments provide for a memory device or a memory sub-system that uses versioning of stored data to facilitate a rollback operation/behavior, a checkpoint operation/behavior, or both. Additionally, some embodiments provide for a transactional memory device or a transactional memory sub-system that uses versioning of stored data to enable rollback of a memory transaction, commitment of a memory transaction, or handling of a read or write command associated with respect to a memory transaction.

    Memory management unit (MMU) for accessing borrowed memory
    7.
    发明授权
    Memory management unit (MMU) for accessing borrowed memory 有权

    公开(公告)号：US11100007B2

    公开(公告)日：2021-08-24

    申请号：US16424420

    申请日：2019-05-28

    Applicant: Micron Technology, Inc.

    Inventor： Samuel E. Bradshaw ,  Ameen D. Akel ,  Kenneth Marion Curewitz ,  Sean Stephen Eilert ,  Dmitri Yudanov

    IPC: G06F12/1027 ,  H04L29/08 ,  H04W84/04

    Abstract: Systems, methods and apparatuses to accelerate accessing of borrowed memory over network connection are described. For example, a memory management unit (MMU) of a computing device can be configured to be connected both to the random access memory over a memory bus and to a computer network via a communication device. The computing device can borrow an amount of memory from a remote device over a network connection using the communication device; and applications running in the computing device can use virtual memory addresses mapped to the borrowed memory. When a virtual address mapped to the borrowed memory is used, the MMU translates the virtual address into a physical address and instruct the communication device to access the borrowed memory.

    DATA DUPLICATION IN A NON-VOLATILE MEMORY
    8.
    发明申请
    DATA DUPLICATION IN A NON-VOLATILE MEMORY 审中-公开

    公开(公告)号：US20190354429A1

    公开(公告)日：2019-11-21

    申请号：US15983647

    申请日：2018-05-18

    Applicant: Micron Technology, Inc.

    Inventor： Samuel E. Bradshaw ,  Justin Eno ,  Sean Stephen Eilert ,  Sai Krishna Mylavarapu

    IPC: G06F11/10 ,  G06F3/06

    Abstract: Exemplary methods, apparatuses, and systems include a memory controller receiving a user payload to be written to a memory. The memory controller determines a plurality of locations within the memory within which the user payload will be written. After detecting the destination of the user payload, the memory controller detects, within a data structure, the presence of an identifier of a first location within a user data portion of the plurality of locations. The memory controller writes the user payload to the user data portion of the plurality of locations and, in response to detecting the presence of the identifier in the data structure, writes a copy of one or more bits in the user payload written to the first location to a spare data portion of the plurality of locations.

    Machine learning with feature obfuscation
    10.
    发明授权
    Machine learning with feature obfuscation 有权

    公开(公告)号：US11636334B2

    公开(公告)日：2023-04-25

    申请号：US16545837

    申请日：2019-08-20

    Applicant: Micron Technology, Inc.

    Inventor： Samuel E. Bradshaw ,  Shivasankar Gunasekaran ,  Sean Stephen Eilert ,  Ameen D. Akel ,  Kenneth Marion Curewitz

    IPC: G06N3/08 ,  G06F21/60 ,  G06N3/04 ,  G06N20/00 ,  G06F21/62

    Abstract: A system having multiple devices that can host different versions of an artificial neural network (ANN). In the system, inputs for the ANN can be obfuscated for centralized training of a master version of the ANN at a first computing device. A second computing device in the system includes memory that stores a local version of the ANN and user data for inputting into the local version. The second computing device includes a processor that extracts features from the user data and obfuscates the extracted features to generate obfuscated user data. The second device includes a transceiver that transmits the obfuscated user data. The first computing device includes a memory that stores the master version of the ANN, a transceiver that receives obfuscated user data transmitted from the second computing device, and a processor that trains the master version based on the received obfuscated user data using machine learning.

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