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公开(公告)号:US06362666B1
公开(公告)日:2002-03-26
申请号:US09475102
申请日:1999-12-30
申请人: Morteza Afghahi , Yueming He
发明人: Morteza Afghahi , Yueming He
IPC分类号: H03B100
CPC分类号: H03K19/01721
摘要: An embodiment of the invention is directed to a buffer circuit having a closed loop negative feedback amplifier that is coupled to continuously drive a node to a predetermined set voltage. A precharge circuit is coupled to selectively drive the node at a higher rate than the amplifier. The buffer circuit is particularly useful for reducing the recovery and settling time of the node voltage when the node is suddenly subjected to a large, capacitive load.
摘要翻译: 本发明的实施例涉及一种具有闭环负反馈放大器的缓冲电路,其耦合以将节点连续地驱动到预定的设定电压。 耦合预充电电路以比放大器更高的速率选择性地驱动节点。 当节点突然经受大的容性负载时,缓冲电路对于降低节点电压的恢复和建立时间特别有用。
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公开(公告)号:US06313455B1
公开(公告)日:2001-11-06
申请号:US09375826
申请日:1999-08-16
申请人: Morteza Afghahi
发明人: Morteza Afghahi
IPC分类号: H01L2700
CPC分类号: H04N5/3741
摘要: The present invention includes, in one embodiment thereof, a pixel cell cell. The pixel cell includes a photosensor to detect light and a source following device. The source following device is coupled to the photosensor. The source following device has a source coupled to a select line that when asserted, permits reading out of information indicative of an intensity of light detected by the photosensor.
摘要翻译: 本发明在其一个实施例中包括像素单元电池。 像素单元包括用于检测光的光电传感器和源跟随器件。 光源跟随器件耦合到光电传感器。 源跟随装置具有耦合到选择线的源,当被断言时,允许读出指示由光传感器检测到的光的强度的信息。
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公开(公告)号:US6046444A
公开(公告)日:2000-04-04
申请号:US987176
申请日:1997-12-08
申请人: Morteza Afghahi
发明人: Morteza Afghahi
IPC分类号: G11C7/00 , G11C27/02 , H01L27/146 , H04N5/353 , H04N5/355 , H04N5/3745 , G11C19/30 , H01L27/02
CPC分类号: H04N5/37452 , G11C27/026 , G11C7/005 , H01L27/14609 , H04N5/353 , H04N5/355
摘要: A high sensitivity active pixel for use in MOS image sensor circuits. The pixel circuit design allows the use of digital MOS fabrication processes to be used in implementing a pixel circuit having greater sensitivity (allowing increased frame rate) and greater noise immunity than certain prior art pixels. The novel pixel features a source follower configured amplifier, such as a single MOS FET, coupled between a photodetector and a storage capacitor. A light-generated signal from the photodetector is used to control the charge placed in the storage capacitor in order to develop a capture voltage. In a particular embodiment, an n-channel source follower and a p-channel output stage are combined in the pixel to make the overall transfer function of the pixel more linear and distortion-free. In particular, the pixel transfer function becomes more linear for weak light-generated signals, whereas with conventional pixels, the pixel output signals are often distorted and even suppressed when the light-generated signal is weak. The novel pixel circuit may find particular use in a portable digital image capture system such as a digital camera.
摘要翻译: 用于MOS图像传感器电路的高灵敏度有源像素。 像素电路设计允许使用数字MOS制造工艺来实现比某些现有技术像素具有更高灵敏度(允许增加的帧速率)和更大的抗噪声能力的像素电路。 新颖像素具有耦合在光电检测器和存储电容器之间的源极跟随器配置放大器,例如单个MOS FET。 来自光电检测器的光产生信号用于控制放置在存储电容器中的电荷,以产生捕获电压。 在特定实施例中,在像素中组合n沟道源极跟随器和p沟道输出级,以使像素的整体传递函数更线性和无失真。 特别地,对于弱光产生信号,像素传递函数变得更线性,而对于常规像素,当光产生信号弱时,像素输出信号常常失真并且甚至被抑制。 新颖的像素电路可以在诸如数字照相机的便携式数字图像捕获系统中发现。
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公开(公告)号:US5955899A
公开(公告)日:1999-09-21
申请号:US789006
申请日:1997-01-27
申请人: Morteza Afghahi
发明人: Morteza Afghahi
CPC分类号: H03K3/356113 , H03K3/356182
摘要: A compact electronic comparator circuit is featuring a single amplifier having two loads. The comparator is a symmetrical circuit having a pair of transistors to which positive and negative feedback loads are coupled so as to yield a constant infinite load. The comparator first amplifies the two input signals, and then operates as a regenerative latch in response to an external signal once the input signals have been sufficiently amplified. The comparator may be used in A/D converter and DRAM applications.
摘要翻译: 紧凑型电子比较器电路具有单个放大器,具有两个负载。 比较器是具有一对晶体管的对称电路,正和负反馈负载耦合到这些晶体管,以产生恒定的无限负载。 比较器首先放大两个输入信号,然后一旦输入信号被充分放大,就响应外部信号而作为再生锁存器工作。 比较器可用于A / D转换器和DRAM应用。
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25.
公开(公告)号:US20120223756A1
公开(公告)日:2012-09-06
申请号:US13044002
申请日:2011-03-09
申请人: Morteza Afghahi
发明人: Morteza Afghahi
IPC分类号: H03K3/02 , H03K3/3562
CPC分类号: H03K3/35625 , H03K3/012
摘要: A master-slave flip-flop may be operable to sense a signal, received by a slave circuit from a master circuit, at a pair of serially coupled NMOS transistors and/or at a pair of serially coupled PMOS transistors in the slave circuit. The flip-flop may generate a corresponding output signal at an output terminal based on the sensing of the signal received by the slave circuit. The flip-flop may receive, in a feedback path of the slave circuit, a SET signal. An inverted version of the SET signal may be received via a gate terminal of a PMOS transistor in the master circuit. The flip-flop may receive, in a feedback path of the master circuit, a RESET signal. The RESET signal may also be received via a gate of a NMOS transistor in the master circuit. The flip-flop may disable an input terminal utilizing the SET signal and/or the RESET signal.
摘要翻译: 主从触发器可以用于在从电路中的一对串联耦合的NMOS晶体管和/或一对串联耦合的PMOS晶体管上感测由从电路接收的来自主电路的信号。 触发器可以基于对由从电路接收的信号的感测而在输出端产生相应的输出信号。 触发器可以在从电路的反馈路径中接收SET信号。 可以经由主电路中的PMOS晶体管的栅极端子接收SET信号的反相版本。 触发器可以在主电路的反馈路径中接收RESET信号。 也可以通过主电路中的NMOS晶体管的栅极接收RESET信号。 触发器可以利用SET信号和/或RESET信号禁用输入端。
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公开(公告)号:US20080224729A1
公开(公告)日:2008-09-18
申请号:US11857133
申请日:2007-09-18
申请人: Morteza Afghahi , Esin Terzioglu , Gil I. Winograd
发明人: Morteza Afghahi , Esin Terzioglu , Gil I. Winograd
IPC分类号: H03K17/16
CPC分类号: H03K19/0016
摘要: In one embodiment, NMOS transistors have their source coupled to a common source node such that the NMOS transistors conduct a leakage current if the common source node is grounded. To reduce this leakage current, the common source node is raised in potential. Similarly, PMOS transistors have their source coupled to a common source node such that the PMOS transistors conduct a leakage current if the common source node is charged to a power supply voltage VDD. To reduce this leakage current, the common source node is lowered in potential.
摘要翻译: 在一个实施例中,NMOS晶体管的源极耦合到公共源节点,使得如果公共源节点接地,则NMOS晶体管导通泄漏电流。 为了减少漏电流,公共源节点处于潜在状态。 类似地,PMOS晶体管的源极耦合到公共源节点,使得如果公共源节点被充电到电源电压VDD,则PMOS晶体管传导泄漏电流。 为了减少漏电流,公共源节点的电位降低。
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公开(公告)号:US20070041259A1
公开(公告)日:2007-02-22
申请号:US11370738
申请日:2006-03-07
申请人: Esin Terzioglu , Gil Winograd , Morteza Afghahi
发明人: Esin Terzioglu , Gil Winograd , Morteza Afghahi
IPC分类号: G11C7/02
CPC分类号: G11C11/4091 , G11C7/02 , G11C7/065 , G11C7/12 , G11C11/401 , G11C11/4094 , G11C29/02 , G11C29/026 , G11C29/028 , G11C2207/2254 , H01L27/0207 , H01L27/10873 , H03K3/356034
摘要: In one embodiment, a sense amplifier includes: a differential amplifier adapted to amplify a voltage difference between a pair of bit lines; and a self-bias generation circuit adapted to reduce an offset bias in the differential amplifier with regard to the amplification of the voltage difference between the pair of bit lines.
摘要翻译: 在一个实施例中,读出放大器包括:差分放大器,适于放大一对位线之间的电压差; 以及自偏置生成电路,适于相对于所述一对位线之间的电压差的放大来减小所述差分放大器中的偏移偏置。
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公开(公告)号:US20070040575A1
公开(公告)日:2007-02-22
申请号:US11301236
申请日:2005-12-12
申请人: Morteza Afghahi , Esin Terzioglu , Gil Winograd
发明人: Morteza Afghahi , Esin Terzioglu , Gil Winograd
IPC分类号: H03K19/003
CPC分类号: H03K19/0016
摘要: In one embodiment, NMOS transistors have their source coupled to a common source node such that the NMOS transistors conduct a leakage current if the common source node is grounded. To reduce this leakage current, the common source node is raised in potential. Similarly, PMOS transistors have their source coupled to a common source node such that the PMOS transistors conduct a leakage current if the common source node is charged to a power supply voltage VDD. To reduce this leakage current, the common source node is lowered in potential.
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公开(公告)号:US20050128824A1
公开(公告)日:2005-06-16
申请号:US11050120
申请日:2005-02-03
申请人: Morteza Afghahi
发明人: Morteza Afghahi
CPC分类号: H03K3/0315
摘要: An oscillator having multi-phase complementary outputs comprises a first plurality of single ended amplifiers connected in series to form an input and an output and a second plurality of single ended amplifiers connected in series to form an input and an output. The first and second plurality have the same odd number of amplifiers, A first feedback path connects the output to the input of the first plurality of amplifiers to establish oscillations in the first plurality of amplifiers at a frequency dependent upon the delay time from the input to the output of the first plurality. A second feedback path connects the output to the input of the second plurality of amplifiers to establish oscillations in the second plurality of amplifiers at a frequency dependent upon the delay time from the input to the output of the second plurality. A first locking circuit is connected between comparable first points in the first and second plurality of amplifiers to ensure that the first points are oscillating in complementary fashion and a second locking circuit is connected between comparable second points in the first and second plurality of amplifiers to ensure that the second points are oscillating in complementary fashion.
摘要翻译: 具有多相互补输出的振荡器包括串联连接的第一组多个单端放大器,以形成串联连接的输入和输出以及第二多个单端放大器,以形成输入和输出。 第一和第二多个具有相同的奇数个放大器,第一反馈路径将输出连接到第一多个放大器的输入端,以在第一多个放大器中的频率上建立振荡,该频率取决于从输入到 第一组的输出。 第二反馈路径将输出连接到第二多个放大器的输入,以在取决于从输入到第二多个输出的输出的延迟时间的频率下在第二多个放大器中建立振荡。 第一锁定电路连接在第一和第二多个放大器中的可比较的第一点之间以确保第一点以互补的方式振荡,并且第二锁定电路连接在第一和第二多个放大器中的相似的第二点之间以确保 第二点是以互补的方式振荡起来。
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公开(公告)号:US06717616B1
公开(公告)日:2004-04-06
申请号:US09374815
申请日:1999-08-16
申请人: Morteza Afghahi , Khalil Waleed , Issa Sami
发明人: Morteza Afghahi , Khalil Waleed , Issa Sami
IPC分类号: H04N5235
CPC分类号: H04N5/3745
摘要: A read out circuit for an active pixel sensor array is provided. The read out circuit includes an amplifier that has a first and second input devices and an output port. The first input device is included in a pixel of an active pixel sensor array to receive an input signal indicative of an intensity of light detected by the pixel. The amplifier generates at an output thereof an output signal proportional to the input signal.
摘要翻译: 提供了一种用于有源像素传感器阵列的读出电路。 读出电路包括具有第一和第二输入装置和输出端口的放大器。 第一输入设备被包括在有源像素传感器阵列的像素中,以接收指示由像素检测到的光的强度的输入信号。 放大器在其输出处产生与输入信号成比例的输出信号。
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