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公开(公告)号：US20230132964A1
公开(公告)日：2023-05-04
申请号：US18147849
申请日：2022-12-29
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Satoshi TANAKA , Satoshi ARAYASHIKI , Satoshi GOTO , Yusuke TANAKA
Abstract: A power amplifier circuit includes a first transistor having an emitter electrically connected to a common potential, a base to which a first high-frequency signal is input, and a collector from which a third high-frequency signal is output; a second transistor having an emitter electrically connected to the common potential, a base to which a second high-frequency signal is input, and a collector from which a fourth high-frequency signal is output; a first capacitance circuit electrically connected between the collector of the second transistor and the base of the first transistor; and a second capacitance circuit electrically connected between the collector of the first transistor and the base of the second transistor.
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公开(公告)号：US20220294395A1
公开(公告)日：2022-09-15
申请号：US17805277
申请日：2022-06-03
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Satoshi TANAKA , Kiichiro TAKENAKA , Satoshi ARAYASHIKI , Satoshi SAKURAI
Abstract: A Doherty amplifier including a main amplifier and a peak amplifier is mounted on a package substrate. A low noise amplifier is further mounted on the package substrate. A transmit/receive switch switches in terms of time between a transmission connection state in which an output signal of the Doherty amplifier is supplied to an antenna and a reception connection state in which a signal received by the antenna is inputted to the low noise amplifier.
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公开(公告)号：US20210194433A1
公开(公告)日：2021-06-24
申请号：US17195770
申请日：2021-03-09
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Satoshi TANAKA , Satoshi ARAYASHIKI , Kazuo WATANABE
Abstract: A power amplifier circuit includes a first amplifier that amplifies an input signal and outputs an output signal; a second amplifier that, in accordance with a control signal, amplifies a signal corresponding to the input signal, generates a signal having an opposite phase to that of the output signal, and adds the signal to the output signal; and a control circuit that supplies the control signal to the second amplifier. The control circuit outputs the control signal so that during operation of the power amplifier circuit in a first power mode, a gain of the second amplifier is not less than zero and less than a predetermined level and during operation in a second power mode lower than the first power mode in output power level, a gain of the second amplifier is not less than the predetermined level and less than a gain of the first amplifier.
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Patent Agency Ranking
公开(公告)号：US20200321927A1
公开(公告)日：2020-10-08
申请号：US16839226
申请日：2020-04-03
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Toshikazu TERASHIMA , Fumio HARIMA , Makoto ITOU , Satoshi TANAKA , Kazuo WATANABE , Satoshi ARAYASHIKI , Chikara YOSHIDA
IPC: H03F3/213 , H01L29/417 , H01L27/06 , H01L29/423 , H01L29/737
Abstract: A power amplifier apparatus includes a semiconductor substrate, a plurality of first transistors on the semiconductor substrate, a plurality of second transistors, at least one collector terminal electrically connected to collectors of the plurality of first transistors, a first inductor having a first end electrically connected to the collector terminal and a second end electrically connected to a power supply potential, at least one emitter terminal electrically connected to emitters of the plurality of second transistors and adjacent to the collector terminal in a second direction, a second inductor having a first end electrically connected to the emitter terminal and a second end electrically connected to a reference potential, and at least one capacitor having a first end electrically connected to the collectors of the plurality of first transistors and a second end electrically connected to the emitters of the plurality of second transistors.
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公开(公告)号：US20200295717A1
公开(公告)日：2020-09-17
申请号：US16351916
申请日：2019-03-13
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Satoshi ARAYASHIKI , Satoshi GOTO , Satoshi TANAKA , Yasuhisa YAMAMOTO
Abstract: Provided is a power amplification module that includes: a first transistor, a first signal being inputted to a base thereof; a second transistor, the first signal being inputted to a base thereof and a collector thereof being connected to a collector of the first transistor; a first resistor, a first bias current being supplied to one end thereof and another end thereof being connected to the base of the first transistor; a second resistor, one end thereof being connected to the one end of the first resistor and another end thereof being connected to the base of the second transistor; and a third resistor, a second bias current being supplied to one end thereof and another end thereof being connected to the base of the second transistor.
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公开(公告)号：US20200186185A1
公开(公告)日：2020-06-11
申请号：US16788625
申请日：2020-02-12
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Satoshi SAKURAI , Satoshi ARAYASHIKI , Satoshi TANAKA , Kyoichi HIRAYAMA , Tomohito ITO , Kenta KURAHASHI
Abstract: A high-frequency module includes a transmission signal amplifier that outputs a transmission signal to an antenna terminal side; a reception signal amplifier that amplifies a reception signal supplied from an antenna terminal; a switch that selectively connects the antenna terminal to either an output of the transmission signal amplifier or an input of the reception signal amplifier; and a directional coupler that is provided on a transmission signal path and detects a signal level of the transmission signal. The transmission signal amplifier is controlled by a first control signal supplied from a first control circuit. The reception signal amplifier is controlled by a second control signal supplied from a second control circuit. The switch is controlled by a switch control signal supplied from the first control circuit. The directional coupler is controlled by a coupler control signal supplied from the first control circuit.
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公开(公告)号：US20200083845A1
公开(公告)日：2020-03-12
申请号：US16538932
申请日：2019-08-13
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Satoshi TANAKA , Satoshi ARAYASHIKI , Kazuo WATANABE
Abstract: A power amplifier circuit includes a first amplifier that amplifies an input signal and outputs an output signal; a second amplifier that, in accordance with a control signal, amplifies a signal corresponding to the input signal, generates a signal having an opposite phase to that of the output signal, and adds the signal to the output signal; and a control circuit that supplies the control signal to the second amplifier. The control circuit outputs the control signal so that during operation of the power amplifier circuit in a first power mode, a gain of the second amplifier is not less than zero and less than a predetermined level and during operation in a second power mode lower than the first power mode in output power level, a gain of the second amplifier is not less than the predetermined level and less than a gain of the first amplifier.
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公开(公告)号：US20200014344A1
公开(公告)日：2020-01-09
申请号：US16417723
申请日：2019-05-21
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Satoshi ARAYASHIKI , Kazuo WATANABE , Satoshi TANAKA
Abstract: A power amplifier circuit includes lower-stage and upper-stage differential amplifying pairs, a combiner, first and second inductors, and first and second capacitors. First and second signals are input into the lower-stage differential amplifying pair. The upper-stage differential amplifying pair outputs first and second amplified signals. The combiner combines the first and second amplified signals. The lower-stage differential amplifying pair includes first and second transistors. A supply voltage is supplied to the collectors of the first and second transistors. The first and second signals are supplied to the bases of the first and second transistors. The upper-stage differential amplifying pair includes third and fourth transistors. A supply voltage is supplied to the collectors of the third and fourth transistors. The emitters of the third and fourth transistors are grounded via the first and second inductors and are connected to the first and second transistors via the first and second capacitors.
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