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公开(公告)号：US20180019713A1
公开(公告)日：2018-01-18
申请号：US15717161
申请日：2017-09-27
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Kazuo WATANABE , Satoshi TANAKA , Kazuhito NAKAI , Takayuki TSUTSUI
CPC classification number: H03F1/3205 , H03F1/02 , H03F1/0261 , H03F1/302 , H03F1/32 , H03F3/19 , H03F3/211 , H03F3/24 , H03F3/245 , H03F2200/18 , H03F2200/21 , H03F2200/451 , H03F2201/3215 , H03F2203/21106 , H04B1/0475 , H04B2001/045
Abstract: A power amplification module includes: a first transistor that amplifies a first radio frequency signal and outputs a second radio frequency signal; a second transistor that amplifies the second radio frequency signal and outputs a third radio frequency signal; and first and second bias circuits that supply first and second bias currents to bases of the first and second transistors. The first bias circuit includes a third transistor that outputs the first bias current from its emitter or source, a capacitor that is input with the first radio frequency signal and connected to the base of the first transistor, a first resistor connected between the emitter or source of the third transistor and the base of the first transistor, a second resistor connected between the capacitor and the emitter or source of the third transistor, and a third resistor connected between the capacitor and the base of the first transistor.
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公开(公告)号：US20170155367A1
公开(公告)日：2017-06-01
申请号：US15274313
申请日：2016-09-23
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Kazuo WATANABE , Satoshi TANAKA , Kazuhito NAKAI , Takayuki TSUTSUI
CPC classification number: H03F1/3205 , H03F1/02 , H03F1/0261 , H03F1/302 , H03F1/32 , H03F3/19 , H03F3/211 , H03F3/24 , H03F3/245 , H03F2200/18 , H03F2200/21 , H03F2200/451 , H03F2201/3215 , H03F2203/21106 , H04B1/0475 , H04B2001/045
Abstract: A power amplification module includes: a first transistor that amplifies a first radio frequency signal and outputs a second radio frequency signal; a second transistor that amplifies the second radio frequency signal and outputs a third radio frequency signal; and first and second bias circuits that supply first and second bias currents to bases of the first and second transistors. The first bias circuit includes a third transistor that outputs the first bias current from its emitter or source, a capacitor that is input with the first radio frequency signal and connected to the base of the first transistor, a first resistor connected between the emitter or source of the third transistor and the base of the first transistor, a second resistor connected between the capacitor and the emitter or source of the third transistor, and a third resistor connected between the capacitor and the base of the first transistor.
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公开(公告)号：US20210226595A1
公开(公告)日：2021-07-22
申请号：US17151922
申请日：2021-01-19
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Jun ENOMOTO , Kazuo WATANABE , Satoshi TANAKA , Yusuke TANAKA , Makoto ITO
Abstract: A power amplifier circuit includes a power amplifier including a first transistor having a first terminal connected to a reference potential, a second terminal to which a first current and a radio-frequency signal are input, and a third terminal connected to a first power supply potential via a first inductor; a capacitor connected to the third terminal of the first transistor; a second transistor including a first terminal connected to the capacitor and the reference potential via a second inductor, a second terminal to which a second current is input and is connected to the reference potential, and a third terminal connected to the first power supply potential via a third inductor and outputs signal; and an adjustment circuit that outputs a third current corresponding to the first power supply potential or a second power supply potential to the second terminal of the second transistor.
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公开(公告)号：US20210194433A1
公开(公告)日：2021-06-24
申请号：US17195770
申请日：2021-03-09
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Satoshi TANAKA , Satoshi ARAYASHIKI , Kazuo WATANABE
Abstract: A power amplifier circuit includes a first amplifier that amplifies an input signal and outputs an output signal; a second amplifier that, in accordance with a control signal, amplifies a signal corresponding to the input signal, generates a signal having an opposite phase to that of the output signal, and adds the signal to the output signal; and a control circuit that supplies the control signal to the second amplifier. The control circuit outputs the control signal so that during operation of the power amplifier circuit in a first power mode, a gain of the second amplifier is not less than zero and less than a predetermined level and during operation in a second power mode lower than the first power mode in output power level, a gain of the second amplifier is not less than the predetermined level and less than a gain of the first amplifier.
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公开(公告)号：US20200321927A1
公开(公告)日：2020-10-08
申请号：US16839226
申请日：2020-04-03
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Toshikazu TERASHIMA , Fumio HARIMA , Makoto ITOU , Satoshi TANAKA , Kazuo WATANABE , Satoshi ARAYASHIKI , Chikara YOSHIDA
IPC: H03F3/213 , H01L29/417 , H01L27/06 , H01L29/423 , H01L29/737
Abstract: A power amplifier apparatus includes a semiconductor substrate, a plurality of first transistors on the semiconductor substrate, a plurality of second transistors, at least one collector terminal electrically connected to collectors of the plurality of first transistors, a first inductor having a first end electrically connected to the collector terminal and a second end electrically connected to a power supply potential, at least one emitter terminal electrically connected to emitters of the plurality of second transistors and adjacent to the collector terminal in a second direction, a second inductor having a first end electrically connected to the emitter terminal and a second end electrically connected to a reference potential, and at least one capacitor having a first end electrically connected to the collectors of the plurality of first transistors and a second end electrically connected to the emitters of the plurality of second transistors.
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Patent Agency Ranking
公开(公告)号：US20200083845A1
公开(公告)日：2020-03-12
申请号：US16538932
申请日：2019-08-13
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Satoshi TANAKA , Satoshi ARAYASHIKI , Kazuo WATANABE
Abstract: A power amplifier circuit includes a first amplifier that amplifies an input signal and outputs an output signal; a second amplifier that, in accordance with a control signal, amplifies a signal corresponding to the input signal, generates a signal having an opposite phase to that of the output signal, and adds the signal to the output signal; and a control circuit that supplies the control signal to the second amplifier. The control circuit outputs the control signal so that during operation of the power amplifier circuit in a first power mode, a gain of the second amplifier is not less than zero and less than a predetermined level and during operation in a second power mode lower than the first power mode in output power level, a gain of the second amplifier is not less than the predetermined level and less than a gain of the first amplifier.
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公开(公告)号：US20200014344A1
公开(公告)日：2020-01-09
申请号：US16417723
申请日：2019-05-21
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Satoshi ARAYASHIKI , Kazuo WATANABE , Satoshi TANAKA
Abstract: A power amplifier circuit includes lower-stage and upper-stage differential amplifying pairs, a combiner, first and second inductors, and first and second capacitors. First and second signals are input into the lower-stage differential amplifying pair. The upper-stage differential amplifying pair outputs first and second amplified signals. The combiner combines the first and second amplified signals. The lower-stage differential amplifying pair includes first and second transistors. A supply voltage is supplied to the collectors of the first and second transistors. The first and second signals are supplied to the bases of the first and second transistors. The upper-stage differential amplifying pair includes third and fourth transistors. A supply voltage is supplied to the collectors of the third and fourth transistors. The emitters of the third and fourth transistors are grounded via the first and second inductors and are connected to the first and second transistors via the first and second capacitors.
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公开(公告)号：US20210006205A1
公开(公告)日：2021-01-07
申请号：US17024245
申请日：2020-09-17
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Satoshi TANAKA , Tetsuaki ADACHI , Kazuo WATANABE , Masahito NUMANAMI , Yasuhisa YAMAMOTO
Abstract: Provided is a power amplification circuit that includes: an amplifier that amplifies an input signal and outputs an amplified signal; a first bias circuit that supplies a first bias current or voltage to the amplifier; a second bias circuit that supplies a second bias current or voltage to the amplifier; a first control circuit that controls the first bias current or voltage; and a second control circuit that controls the second bias current or voltage. The current supplying capacity of the first bias circuit is different from the current supplying capacity of the second bias circuit.
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公开(公告)号：US20200304071A1
公开(公告)日：2020-09-24
申请号：US16898156
申请日：2020-06-10
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Satoshi Tanaka , Masatoshi HASE , Norio HAYASHI , Kazuo WATANABE , Yuuri HONDA
Abstract: A power amplifier circuit includes an amplifier that receives an input signal with an alternating current and outputs an output signal obtained by amplifying power of the input signal to a first node; an inductive element that is connected between the first node and a second node; and a variable capacitor that is connected between the second node and a reference potential, and whose electrostatic capacitance increases as power of the output signal increases.
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公开(公告)号：US20180006608A1
公开(公告)日：2018-01-04
申请号：US15480584
申请日：2017-04-06
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Satoshi TANAKA , Tetsuaki ADACHI , Kazuo WATANABE , Masahito NUMANAMI , Yasuhisa YAMAMOTO
CPC classification number: H03F1/0205 , H03F1/0216 , H03F1/0261 , H03F1/302 , H03F3/191 , H03F3/193 , H03F2200/18 , H03F2200/222 , H03F2200/318 , H03F2200/387 , H03F2200/411 , H03F2200/451 , H03F2200/555
Abstract: Provided is a bias circuit that supplies a first bias current or voltage to an amplifier that amplifies a radio frequency signal. The bias circuit includes: an FET that has a power supply voltage supplied to a drain thereof and that outputs the first bias current or voltage from a source thereof; a first bipolar transistor that has a collector thereof connected to a gate of the FET, that has a base thereof connected to the source of the FET, that has a common emitter and that has a constant current supplied to the collector thereof; and a first capacitor that has one end thereof connected to the collector of the first bipolar transistor and that suppresses variations in a collector voltage of the first bipolar transistor.
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