CIRCUITS AND METHODS FOR CONTROLLING A VOLTAGE OF A SEMICONDUCTOR SUBSTRATE

    公开(公告)号:US20230112152A1

    公开(公告)日:2023-04-13

    申请号:US18064185

    申请日:2022-12-09

    Abstract: An electronic device includes a semiconductor substrate and a bidirectional transistor switch formed on the substrate, the bidirectional switch including a first source node, a second source node and a common drain node. A first transistor is formed on the substrate and includes a first source terminal, a first drain terminal and a first gate terminal, wherein the first source terminal is connected to the substrate, the first drain terminal is connected to the first source node and the first gate terminal is connected to the second source node. A second transistor is formed on the substrate and includes a second source terminal, a second drain terminal and a second gate terminal, wherein the second source terminal is connected to the substrate, the second drain terminal is connected to the second source node and the second gate terminal is connected to the first source node.

    CIRCUITS AND METHODS FOR CONTROLLING A VOLTAGE OF A SEMICONDUCTOR SUBSTRATE

    公开(公告)号:US20220416777A1

    公开(公告)日:2022-12-29

    申请号:US17850792

    申请日:2022-06-27

    Abstract: An electronic device includes a semiconductor substrate and a bidirectional transistor switch formed on the substrate, the bidirectional switch including a first source node, a second source node and a common drain node. A first transistor is formed on the substrate and includes a first source terminal, a first drain terminal and a first gate terminal, wherein the first source terminal is connected to the substrate, the first drain terminal is connected to the first source node and the first gate terminal is connected to the second source node. A second transistor is formed on the substrate and includes a second source terminal, a second drain terminal and a second gate terminal, wherein the second source terminal is connected to the substrate, the second drain terminal is connected to the second source node and the second gate terminal is connected to the first source node.

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