公开(公告)号：US12057824B2

公开(公告)日：2024-08-06

申请号：US17850792

申请日：2022-06-27

Applicant: Navitas Semiconductor Limited

Inventor： Santosh Sharma ,  Daniel M. Kinzer ,  Ren Huei Tzeng

IPC: H03K17/082 ,  G05F3/26 ,  H01L29/20 ,  H03K17/687

CPC classification number: H03K17/0822 ,  G05F3/262 ,  H01L29/2003 ,  H03K17/6871

Abstract: An electronic device includes a semiconductor substrate and a bidirectional transistor switch formed on the substrate, the bidirectional switch including a first source node, a second source node and a common drain node. A first transistor is formed on the substrate and includes a first source terminal, a first drain terminal and a first gate terminal, wherein the first source terminal is connected to the substrate, the first drain terminal is connected to the first source node and the first gate terminal is connected to the second source node. A second transistor is formed on the substrate and includes a second source terminal, a second drain terminal and a second gate terminal, wherein the second source terminal is connected to the substrate, the second drain terminal is connected to the second source node and the second gate terminal is connected to the first source node.

公开(公告)号：US11757290B2

公开(公告)日：2023-09-12

申请号：US17819608

申请日：2022-08-12

Applicant: Navitas Semiconductor Limited

Inventor： Daniel M. Kinzer ,  Santosh Sharma ,  Ju Jason Zhang

IPC: H02M1/088 ,  H02M3/158 ,  H03K3/012 ,  H01L27/088 ,  H01L23/528 ,  H02J7/00 ,  H01L23/495 ,  H01L27/02 ,  H01L23/62 ,  H01L29/20 ,  H03K17/10 ,  H03K19/0185 ,  H01L25/07 ,  H02M3/157 ,  H03K3/356 ,  H01L29/10 ,  H01L29/40 ,  H01L29/417 ,  H02M1/00 ,  H02M3/155

CPC classification number: H02J7/00 ,  H01L23/49503 ,  H01L23/49562 ,  H01L23/49575 ,  H01L23/528 ,  H01L23/62 ,  H01L25/072 ,  H01L27/0248 ,  H01L27/088 ,  H01L27/0883 ,  H01L29/1033 ,  H01L29/2003 ,  H01L29/402 ,  H01L29/41758 ,  H02M1/088 ,  H02M3/157 ,  H02M3/1584 ,  H02M3/1588 ,  H03K3/012 ,  H03K3/356017 ,  H03K17/102 ,  H03K19/018507 ,  H01L2924/00 ,  H01L2924/0002 ,  H02M1/0048 ,  H02M3/155 ,  Y02B40/00 ,  Y02B70/10 ,  H01L2924/0002 ,  H01L2924/00

Abstract: GaN-based half bridge power conversion circuits employ control, support and logic functions that are monolithically integrated on the same devices as the power transistors. In some embodiments a low side GaN device communicates through one or more level shift circuits with a high side GaN device. Various embodiments of level shift circuits and their inventive aspects are disclosed.

公开(公告)号：US20230031402A1

公开(公告)日：2023-02-02

申请号：US17811797

申请日：2022-07-11

Applicant: Navitas Semiconductor Limited

Inventor： Daniel M. Kinzer ,  Santosh Sharma ,  Ju Jason Zhang

IPC: H02J7/00 ,  H01L23/495 ,  H01L27/02 ,  H01L23/62 ,  H02M1/088 ,  H02M3/158 ,  H03K3/012 ,  H01L29/20 ,  H03K17/10 ,  H03K19/0185 ,  H01L25/07 ,  H02M3/157 ,  H03K3/356 ,  H01L27/088 ,  H01L23/528 ,  H01L29/10 ,  H01L29/40 ,  H01L29/417

Abstract: GaN-based half bridge power conversion circuits employ control, support and logic functions that are monolithically integrated on the same devices as the power transistors. In some embodiments a low side GaN device communicates through one or more level shift circuits with a high side GaN device. Various embodiments of level shift circuits and their inventive aspects are disclosed.

公开(公告)号：US20230006657A1

公开(公告)日：2023-01-05

申请号：US17853740

申请日：2022-06-29

Applicant: Navitas Semiconductor Limited

Inventor： Hongwei Jia ,  Santosh Sharma ,  Daniel M. Kinzer ,  Victor Sinow ,  Matthew Anthony Topp

IPC: H03K3/012

Abstract: Circuits and methods that control a rate of change of a drain voltage as a function of time in a transistor are disclosed. In one aspect, the circuit includes a transistor having a gate terminal that controls operation of the transistor, and a control circuit coupled to the gate terminal and arranged to change a voltage at the gate terminal at a first rate of voltage with respect to time from a first voltage to a first intermediate voltage, and further arranged to change the voltage at the gate terminal at a second rate of voltage with respect to time from the first intermediate voltage to a second intermediate voltage, where the first rate is different than the second rate.

公开(公告)号：US20220393481A1

公开(公告)日：2022-12-08

申请号：US17820829

申请日：2022-08-18

Applicant: Navitas Semiconductor Limited

Inventor： Daniel M. Kinzer ,  Santosh Sharma ,  Ju Jason Zhang

IPC: H02J7/00 ,  H01L23/495 ,  H01L27/02 ,  H01L23/62 ,  H02M1/088 ,  H02M3/158 ,  H03K3/012 ,  H01L29/20 ,  H03K17/10 ,  H03K19/0185 ,  H01L25/07 ,  H02M3/157 ,  H03K3/356 ,  H01L27/088 ,  H01L23/528 ,  H01L29/10 ,  H01L29/40 ,  H01L29/417

Abstract: GaN-based half bridge power conversion circuits employ control, support and logic functions that are monolithically integrated on the same devices as the power transistors. In some embodiments a low side GaN device communicates through one or more level shift circuits with a high side GaN device. Various embodiments of level shift circuits and their inventive aspects are disclosed.

公开(公告)号：US20240421813A1

公开(公告)日：2024-12-19

申请号：US18754010

申请日：2024-06-25

Applicant: Navitas Semiconductor Limited

Inventor： Santosh Sharma ,  Daniel M. Kinzer ,  Ren Huei Tzeng

IPC: H03K17/082 ,  G05F3/26 ,  H01L29/20 ,  H03K17/687

Abstract: An electronic device includes a semiconductor substrate and a bidirectional transistor switch formed on the substrate, the bidirectional switch including a first source node, a second source node and a common drain node. A first transistor is formed on the substrate and includes a first source terminal, a first drain terminal and a first gate terminal, wherein the first source terminal is connected to the substrate, the first drain terminal is connected to the first source node and the first gate terminal is connected to the second source node. A second transistor is formed on the substrate and includes a second source terminal, a second drain terminal and a second gate terminal, wherein the second source terminal is connected to the substrate, the second drain terminal is connected to the second source node and the second gate terminal is connected to the first source node.

公开(公告)号：US11862996B2

公开(公告)日：2024-01-02

申请号：US17811797

申请日：2022-07-11

Applicant: Navitas Semiconductor Limited

Inventor： Daniel M. Kinzer ,  Santosh Sharma ,  Ju Jason Zhang

IPC: H02M3/158 ,  H02J7/00 ,  H01L23/495 ,  H01L27/02 ,  H01L23/62 ,  H02M1/088 ,  H03K3/012 ,  H01L29/20 ,  H03K17/10 ,  H03K19/0185 ,  H01L25/07 ,  H02M3/157 ,  H03K3/356 ,  H01L27/088 ,  H01L23/528 ,  H01L29/10 ,  H01L29/40 ,  H01L29/417 ,  H02M1/00 ,  H02M3/155

CPC classification number: H02J7/00 ,  H01L23/49503 ,  H01L23/49562 ,  H01L23/49575 ,  H01L23/528 ,  H01L23/62 ,  H01L25/072 ,  H01L27/0248 ,  H01L27/088 ,  H01L27/0883 ,  H01L29/1033 ,  H01L29/2003 ,  H01L29/402 ,  H01L29/41758 ,  H02M1/088 ,  H02M3/157 ,  H02M3/1584 ,  H02M3/1588 ,  H03K3/012 ,  H03K3/356017 ,  H03K17/102 ,  H03K19/018507 ,  H01L2924/00 ,  H01L2924/0002 ,  H02M1/0048 ,  H02M3/155 ,  Y02B40/00 ,  Y02B70/10 ,  H01L2924/0002 ,  H01L2924/00

Abstract: GaN-based half bridge power conversion circuits employ control, support and logic functions that are monolithically integrated on the same devices as the power transistors. In some embodiments a low side GaN device communicates through one or more level shift circuits with a high side GaN device. Various embodiments of level shift circuits and their inventive aspects are disclosed.

公开(公告)号：US11770010B2

公开(公告)日：2023-09-26

申请号：US18064209

申请日：2022-12-09

Applicant: Navitas Semiconductor Limited

Inventor： Daniel M. Kinzer ,  Santosh Sharma ,  Ju Jason Zhang

IPC: H02M3/158 ,  H02J7/00 ,  H01L23/495 ,  H01L27/02 ,  H01L23/62 ,  H02M1/088 ,  H03K3/012 ,  H01L29/20 ,  H03K17/10 ,  H03K19/0185 ,  H01L25/07 ,  H02M3/157 ,  H03K3/356 ,  H01L27/088 ,  H01L23/528 ,  H01L29/10 ,  H01L29/40 ,  H01L29/417 ,  H02M1/00 ,  H02M3/155

CPC classification number: H02J7/00 ,  H01L23/49503 ,  H01L23/49562 ,  H01L23/49575 ,  H01L23/528 ,  H01L23/62 ,  H01L25/072 ,  H01L27/0248 ,  H01L27/088 ,  H01L27/0883 ,  H01L29/1033 ,  H01L29/2003 ,  H01L29/402 ,  H01L29/41758 ,  H02M1/088 ,  H02M3/157 ,  H02M3/1584 ,  H02M3/1588 ,  H03K3/012 ,  H03K3/356017 ,  H03K17/102 ,  H03K19/018507 ,  H01L2924/00 ,  H01L2924/0002 ,  H02M1/0048 ,  H02M3/155 ,  Y02B40/00 ,  Y02B70/10 ,  H01L2924/0002 ,  H01L2924/00

Abstract: GaN-based half bridge power conversion circuits employ control, support and logic functions that are monolithically integrated on the same devices as the power transistors. In some embodiments a low side GaN device communicates through one or more level shift circuits with a high side GaN device. Various embodiments of level shift circuits and their inventive aspects are disclosed.

公开(公告)号：US11545838B2

公开(公告)日：2023-01-03

申请号：US17820829

申请日：2022-08-18

Applicant: Navitas Semiconductor Limited

Inventor： Daniel M. Kinzer ,  Santosh Sharma ,  Ju Jason Zhang

IPC: H02M3/158 ,  H02J7/00 ,  H01L23/495 ,  H01L27/02 ,  H01L23/62 ,  H02M1/088 ,  H03K3/012 ,  H01L29/20 ,  H03K17/10 ,  H03K19/0185 ,  H01L25/07 ,  H02M3/157 ,  H03K3/356 ,  H01L27/088 ,  H01L23/528 ,  H01L29/10 ,  H01L29/40 ,  H01L29/417 ,  H02M1/00 ,  H02M3/155

Abstract: GaN-based half bridge power conversion circuits employ control, support and logic functions that are monolithically integrated on the same devices as the power transistors. In some embodiments a low side GaN device communicates through one or more level shift circuits with a high side GaN device. Various embodiments of level shift circuits and their inventive aspects are disclosed.

公开(公告)号：US11870429B2

公开(公告)日：2024-01-09

申请号：US18064185

申请日：2022-12-09

Applicant: Navitas Semiconductor Limited

Inventor： Santosh Sharma ,  Daniel M. Kinzer ,  Ren Huei Tzeng

IPC: H03K17/082 ,  G05F3/26 ,  H01L29/20 ,  H03K17/687

CPC classification number: H03K17/0822 ,  G05F3/262 ,  H01L29/2003 ,  H03K17/6871

Abstract: An electronic device includes a semiconductor substrate and a bidirectional transistor switch formed on the substrate, the bidirectional switch including a first source node, a second source node and a common drain node. A first transistor is formed on the substrate and includes a first source terminal, a first drain terminal and a first gate terminal, wherein the first source terminal is connected to the substrate, the first drain terminal is connected to the first source node and the first gate terminal is connected to the second source node. A second transistor is formed on the substrate and includes a second source terminal, a second drain terminal and a second gate terminal, wherein the second source terminal is connected to the substrate, the second drain terminal is connected to the second source node and the second gate terminal is connected to the first source node.