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    Method and device for fault detection
    23.
    发明授权
    Method and device for fault detection 有权
    故障检测方法和装置

    公开(公告)号：US09311477B2

    公开(公告)日：2016-04-12

    申请号：US13715157

    申请日：2012-12-14

    Applicant: Proton World International N.V. ,  STMicroelectronics (Rousset) SAS

    Inventor： Fabrice Marinet ,  Jean-Louis Modave ,  Gilles Van Assche ,  Ronny Van Keer

    IPC: G06F11/00 ,  G06F21/55

    CPC classification number: G06F21/554 ,  G06F11/006 ,  G06F11/073 ,  G06F11/0751 ,  G06F11/079 ,  G06F21/755 ,  G06F2207/7219

    Abstract: The disclosure concerns a method implemented by a processing device. The method includes performing a first execution by the processing device of a computing function based on one or more initial parameters stored in a first memory device. The execution of the computing function generates one or more modified values of at least one of the initial parameters, wherein during the first execution the one or more initial parameters are read from the first memory device and the one or more modified values are stored in a second memory device. The method also includes performing a second execution by the processing device of the computing function based on the one or more initial parameters stored in the first memory device.

    Abstract translation: 本公开涉及由处理装置实现的方法。 该方法包括：基于存储在第一存储器设备中的一个或多个初始参数来执行计算功能的处理设备的第一执行。 计算功能的执行产生至少一个初始参数的一个或多个修改值，其中在第一次执行期间，从第一存储器件读取一个或多个初始参数，并且将一个或多个修改值存储在 第二存储设备。 该方法还包括基于存储在第一存储器件中的一个或多个初始参数来执行计算功能的处理设备的第二执行。

    Monotonic counter
    24.
    发明授权
    Monotonic counter 有权

    公开(公告)号：US11715506B2

    公开(公告)日：2023-08-01

    申请号：US17691870

    申请日：2022-03-10

    Applicant: PROTON WORLD INTERNATIONAL N.V.

    Inventor： Michael Peeters ,  Jean-Louis Modave ,  Ronny Van Keer

    IPC: G11C8/04 ,  G11C7/20

    CPC classification number: G11C8/04 ,  G11C7/20

    Abstract: A monotonic counter stores N binary words representing a value in N memory cells. When i memory cells of consecutive ranks between k modulo N and k+i modulo N each represent a value complementary to a null value, the counter is incremented by erasing a value of a memory cell of rank k+i+1 modulo N. When i+1 memory cells of consecutive ranks between k+1 modulo N and k+i+1 modulo N each represent the value complementary to the null value, the counter is incremented by incrementing a value of a memory cell of rank k modulo N by two step sizes and storing a result in a memory cell of rank k+1 modulo N, wherein, N is an integer greater than or equal to five, k is an integer, and i is an integer between 2 and N−3.

    Non-volatile memory
    25.
    发明授权
    Non-volatile memory 有权

    公开(公告)号：US11061760B2

    公开(公告)日：2021-07-13

    申请号：US16261182

    申请日：2019-01-29

    Applicant: Proton World International N.V.

    Inventor： Jean-Louis Modave ,  Guillaume Docquier

    IPC: G06F11/00 ,  G06F11/10 ,  G06F16/907 ,  G06F12/0802

    Abstract: A method of managing a non-volatile memory includes during a data writing process, selecting, by a program triggering the data writing process, an error detection and correction code from among two codes depending on a type of information being written. The information is written into the non-volatile memory, where the information is associated with the selected error detection and correction code.

    HIERARCHIZATION OF CRYPTOGRAPHIC KEYS IN AN ELECTRONIC CIRCUIT
    30.
    发明申请
    HIERARCHIZATION OF CRYPTOGRAPHIC KEYS IN AN ELECTRONIC CIRCUIT 审中-公开
    电子电路中晶体学的分析

    公开(公告)号：US20160344548A1

    公开(公告)日：2016-11-24

    申请号：US14480053

    申请日：2014-09-08

    Applicant: Proton World International N.V.

    Inventor： Jean-Louis Modave ,  Thierry Huque

    IPC: H04L9/08 ,  G06F21/79

    CPC classification number: H04L9/0861 ,  G06F21/77 ,  G06F21/79 ,  G06F2221/2137 ,  G06Q20/02 ,  G06Q20/3552 ,  G06Q20/3829 ,  G07F7/10 ,  G07F7/1016 ,  H04L9/0819 ,  H04L9/0891 ,  H04L9/0894 ,  H04L2209/24

    Abstract: A method of obtaining, in an electronic circuit, at least one first key intended to be used in a cryptographic mechanism, on the basis of at least one second key contained in the same circuit, the first key being stored in at least one first storage element of the circuit, the first storage element being reinitialized automatically after a duration independent of the fact that the circuit is or is not powered. Also described are applications of this method to encrypted transmissions, usage controls, as well as an electronic circuit implementing these methods.

    Abstract translation: 一种在电子电路中基于同一电路中包含的至少一个第二键获得旨在用于密码机制中的至少一个第一密钥的方法，所述第一密钥存储在至少一个第一存储器 电路的元件，第一存储元件在与电路被供电或未被供电的事实无关的持续时间后自动重新初始化。 还描述了该方法应用于加密传输，使用控制以及实现这些方法的电子电路。

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