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公开(公告)号：US10649916B2
公开(公告)日：2020-05-12
申请号：US15486947
申请日：2017-04-13
Inventor： Michael Peeters , Fabrice Marinet , Jean-Louis Modave
Abstract: A non-volatile memory is organized in pages and has a word writing granularity of one or more bytes and a block erasing granularity of one or more pages. Logical addresses are scrambling into physical addresses used to perform operations in the non-volatile memory. The scrambling includes scrambling logical data addresses based on a page structure of the non-volatile memory and scrambling logical code addresses based on a word structure of the non-volatile memory.
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公开(公告)号：US10158482B2
公开(公告)日：2018-12-18
申请号：US14480053
申请日：2014-09-08
Applicant: Proton World International N.V.
Inventor： Jean-Louis Modave , Thierry Huque
Abstract: A method of obtaining, in an electronic circuit, at least one first key intended to be used in a cryptographic mechanism, on the basis of at least one second key contained in the same circuit, the first key being stored in at least one first storage element of the circuit, the first storage element being reinitialized automatically after a duration independent of the fact that the circuit is or is not powered. Also described are applications of this method to encrypted transmissions, usage controls, as well as an electronic circuit implementing these methods.
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3.发明申请DETECTION OF THE AUTHENTICITY OF AN ELECTRONIC CIRCUIT OR OF A PRODUCT CONTAINING SUCH A CIRCUIT 有权检测电子电路或包含这种电路的产品的正确性公开(公告)号：US20170004333A1
公开(公告)日：2017-01-05
申请号：US14970161
申请日：2015-12-15
Inventor： Jean-Louis Modave , Fabrice Marinet , Denis Farison
Abstract: A method of authenticating a slave device. The method includes initializing, by a host device, a charge retention circuit of the slave device, and receiving, by the host device, an indication of a discharge time of the charge retention circuit. The host device authenticates the slave device based on the received indication of the discharge time of the charge retention device.
Abstract translation: 验证从设备的方法。 该方法包括通过主机设备初始化从设备的电荷保持电路，并且由主机设备接收电荷保持电路的放电时间的指示。 主机设备基于接收到的电荷保持装置的放电时间的指示来认证从设备。
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公开(公告)号：US11776601B2
公开(公告)日：2023-10-03
申请号：US17691881
申请日：2022-03-10
Applicant: PROTON WORLD INTERNATIONAL N.V.
Inventor： Jean-Louis Modave , Michael Peeters , Ronny Van Keer
Abstract: The present disclosure relates to a monotonic counter whose value is represented by a number N of binary words of N memory cells of a non-volatile memory, and being able to implement a step increment operation wherein if only one first memory cell represents a first value different from zero, then a second value equal to the said first value incremented by two times the said step is written into a second memory cell of rank directly higher than the rank of the first memory cell; and if a third and a fourth memory cell of consecutive ranks represent, respectively, a third value and a fourth value different from zero, then the third value of the third memory cell of lower rank is erased.
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公开(公告)号：US20210326202A1
公开(公告)日：2021-10-21
申请号：US17360204
申请日：2021-06-28
Applicant: Proton World International N.V.
Inventor： Jean-Louis Modave , Guillaume Docquier
IPC: G06F11/10 , G06F16/907 , G06F12/0802
Abstract: A method of managing a non-volatile memory includes during a data writing process, selecting, by a program triggering the data writing process, an error detection and correction code from among two codes depending on a type of information being written. The information is written into the non-volatile memory, where the information is associated with the selected error detection and correction code.
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Patent Agency Ranking
公开(公告)号：US20170344310A1
公开(公告)日：2017-11-30
申请号：US15331470
申请日：2016-10-21
Inventor： Michael Peeters , Fabrice Marinet , Jean-Louis Modave , Fabrice Romain
CPC classification number: G06F3/0659 , G06F3/0611 , G06F3/064 , G06F3/0673 , G06F21/52 , G06F21/554 , G06F21/566 , G06F2221/034 , G09C1/00 , H04L9/004 , H04L2209/046 , H04L2209/12
Abstract: An algorithm execution method includes carrying out a first execution of the algorithm by a processing unit, sending at least one first result, which is to be written into a memory, to a memory management circuit, and storing said first result into a first area of the volatile memory. The method also includes carrying out a second execution of the algorithm by the processing unit, sending at least one second result, which is to be written into the memory, to the memory management circuit, and applying, by means of the memory management circuit, a different processing for the at least one second result in the second execution than was applied for the at least one first results in the first execution.
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公开(公告)号：US11003595B2
公开(公告)日：2021-05-11
申请号：US16841403
申请日：2020-04-06
Inventor： Michael Peeters , Fabrice Marinet , Jean-Louis Modave
Abstract: A non-volatile memory is organized in pages and has a word writing granularity of one or more bytes and a block erasing granularity of one or more pages. Logical addresses are scrambling into physical addresses used to perform operations in the non-volatile memory. The scrambling includes scrambling logical data addresses based on a page structure of the non-volatile memory and scrambling logical code addresses based on a word structure of the non-volatile memory.
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公开(公告)号：US10585738B2
公开(公告)日：2020-03-10
申请号：US14996107
申请日：2016-01-14
Inventor： Fabrice Marinet , Jean-Louis Modave , Gilles Van Assche , Ronny Van Keer
Abstract: The disclosure concerns a method implemented by a processing device. The method includes performing a first execution by the processing device of a computing function based on one or more initial parameters stored in a first memory device. The execution of the computing function generates one or more modified values of at least one of the initial parameters, wherein during the first execution the one or more initial parameters are read from the first memory device and the one or more modified values are stored in a second memory device. The method also includes performing a second execution by the processing device of the computing function based on the one or more initial parameters stored in the first memory device.
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9.发明授权公开(公告)号：US10579832B2
公开(公告)日：2020-03-03
申请号：US16200370
申请日：2018-11-26
Inventor： Jean-Louis Modave , Fabrice Marinet , Denis Farison
Abstract: A method of authenticating a slave device. The method includes initializing, by a host device, a charge retention circuit of the slave device, and receiving, by the host device, an indication of a discharge time of the charge retention circuit. The host device authenticates the slave device based on the received indication of the discharge time of the charge retention device.
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公开(公告)号：US20190243705A1
公开(公告)日：2019-08-08
申请号：US16261182
申请日：2019-01-29
Applicant: Proton World International N.V.
Inventor： Jean-Louis Modave , Guillaume Docquier
IPC: G06F11/10 , G06F12/0802 , G06F16/907
CPC classification number: G06F11/1048
Abstract: A method of managing a non-volatile memory includes during a data writing process, selecting, by a program triggering the data writing process, an error detection and correction code from among two codes depending on a type of information being written. The information is written into the non-volatile memory, where the information is associated with the selected error detection and correction code.
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