摘要:
Provided is a frame synchronization apparatus capable of reducing the amount of total computation and computation delays when a receiver of a satellite communication system calculates correlation between an input signal for frame synchronization and a signal sequence of the receiver, since the receiver uses no multiplier. The frame synchronization apparatus includes a correlator to obtain a correlation value of a unique word of a receiver with respect to a symbol data stream of a frame received from a transmitter of the satellite communication system, a comparator to compare the correlation value to a predetermined threshold value, and a determiner to determine whether the frame has been synchronized, based on the result of the comparison by the comparator.
摘要:
Provided are an apparatus and method for deciding a transmission format using a variable frame length and a decoding method using the same. The apparatus for deciding the transmission format using the variable frame length includes: a frame synchronization acquiring unit for acquiring a frame synchronization of a received transmission frame; a correlation analyzing unit for performing a correlation analysis with respect to the transmission frame whose synchronization is acquired, considering frame lengths of respective frame structures; and a transmission frame structure deciding unit for deciding the structure of the received transmission frame using the analyzed correlation. Accordingly, a physical layer signaling code (PLSC) demodulation and decoding performance can be enhanced by determining the structure of the transmitted frame without carrying out a PLSC decoding in such a state that a frequency synchronization is not acquired.
摘要:
An apparatus and method for correcting a frequency offset in a satellite digital video broadcasting system includes a frequency response transformer for receiving a satellite digital video broadcasting signal and acquiring frequency responses divided into positive and negative frequency parts; a rotation/difference value calculation unit for selecting a frequency response inputted from the frequency response transformer and calculating a first value indicating a difference in area without rotation for the selected frequency response, and calculating a second value indicating a difference in area with rotation for the remaining frequency responses; a zero intersection point calculator for dividing an average slope of a straight line formed by the first and second values by the first value, and calculating a zero intersection point of an area difference value on the straight line; and a frequency offset estimator for correcting the zero intersection point to thereby estimate the frequency offset.
摘要:
Provided are an apparatus for estimating a phase error and a phase error correcting system using the phase error estimating apparatus. The apparatus includes: a probability value estimating unit for estimating a negative log probability value for each transmission symbol by transforming a soft output information transferred from the outside to a log A posterior probability ratio (LAPPR) value; an APP value calculating unit for calculating a posterior probability (APP) value by applying a negative exponential function to the transmission symbol; an average value deciding unit for deciding an average value for each transmission symbol using the probability information entirely, partially, or selectively according to a probability information type; and a symbol phase estimating unit for estimating a phase of a symbol based on the decided average value.
摘要:
Provided are an apparatus for estimating an increment in the number of packets arriving at a transmission queue of each terminal and allocating resources to terminals based on the increment in a Demand Assignment Multiple Access (DAMA) satellite communication system, and a method thereof. The method, includes the steps of: a) comparing a summation of requested time slot quantities of terminals with a total number of available time slots; and b) allocating the time slots as much as the requested time slot quantity to each terminal and allocating remaining time slots additionally in proportion to an estimated increase in the number of packets arriving at a transmission queue of each terminal. The apparatus can raise efficiency of resources allocation in DAMA communications and reduce the packet transmission time in a terminal transmission queue.
摘要:
Provided are an apparatus and method for robust Binary Phase Shift Keying/Quadrature Phase Shift Keying (BPSK/QPSK) blind modulation classification. The apparatus includes first and second likelihood value calculators for calculating a likelihood value of a received baseband signal each for of BPSK and QPSK modulation modes. A maximum setting unit derives a maximum value of the likelihood values or ith likelihood ratios calculated by the first and second likelihood value calculators. A flag is set for the maximum value to “1” and a flag for the remaining value is set to “0”. First and second flag combining units combine the flags for the modulation modes. A modulation mode flag setting unit selects a maximum value from the flags combined by the first and second flag combining units.
摘要:
A blind modulation classification apparatus in a satellite communication system improves performance in non-ideal communication environment having frequency error and phase error, by reducing computational burden of test statistic and possibility of numerical error of hardware, with computation of likelihood for each stage independently. The blind modulation classification apparatus includes a plurality of likelihood computing units, each for computing a likelihood value of a received baseband signal for corresponding one of a plurality of modulation schemes; a maximum selecting and setting units for selecting the maximum among the calculated likelihood values and setting a flag corresponding to the maximum to ‘1’ and the other flags to ‘0’; a plurality of flag summing-up units for summing up the flags of the plurality of the modulation schemes; and a modulation scheme selecting unit for selecting the maximum among the summed-up values and selecting the modulation scheme corresponding to the selected value.
摘要:
Disclosed is a quadrature demodulator for high-speed wireless communication, which comprises: an A/D converter for converting received signals into digital signals; a signal recovery unit for recovering carriers and symbol timing from the signals converted by the A/D converter; a decision unit for detecting recovered signals output by the signal recovery unit, and performing a decision process on them; an I/Q gain imbalance detector for detecting gain imbalances of the I and Q-phase components from the recovered signals, and outputting an I/Q gain compensation value for compensating for the gain imbalances; and an I/Q gain compensator, provided between the A/D converter and the signal recovery unit, for reflecting the I/Q gain compensation value output by the I/Q gain imbalance detector to the received signals.
摘要:
A fast LUT predistortion apparatus and method for compensating nonlinear distortion of the high power amplifier HPA is disclosed. The apparatus includes a predistortion unit for predistorting an input complex digital signal based on a look up table LUT implementation and outputting a predistorted complex signal; and a power amplifier for amplifying the predistorted signal and outputting an amplified complex signal.
摘要:
A structure and a method for depuncturing an input bit stream being input to a Viterbi decoder when the Viterbi decoder is designed by using a Radix-4 branch metric calculator in a method for designing the Viterbi decoder that decodes a punctured code at a high-speed, are disclosed. A depuncture structure for Radix-4 branch metric calculation in a high-speed Viterbi decoder includes four FIFOs, four multiplexers, and one Radix-4 branch metric calculator. Two input bit streams of I and Q are connected to two upper FIFOs and two lower FIFOs. An output terminal of FIFO is connected to upper and lower multiplexers of the next stage. One output terminal of each multiplexer is connected to Radix-4 branch metric calculator. As a result, Radix-4 branch metric calculation can be achieved by using the same clock as a clock speed of the input I and Q bit streams. This structure and this method can be applied to a depuncturing process for Radix-4 branch metric calculation of all punctured codes derived from ½ code.