公开(公告)号：US20180269142A1

公开(公告)日：2018-09-20

申请号：US15590111

申请日：2017-05-09

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Chee-Key Chung ,  Yu-Min Lo ,  Han-Hung Chen ,  Chang-Fu Lin ,  Fu-Tang Huang

IPC: H01L23/498 ,  H01L23/14 ,  H01L23/28

CPC classification number: H01L23/49827 ,  H01L23/147 ,  H01L23/28 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/49816 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/00012

Abstract: The disclosure provides a substrate construction applicable to a 3D package, including a silicon substrate for carrying a chip on an upper side thereof, and a circuit structure formed underneath the silicon substrate for being connected to solder balls via conductive pads of the circuit structure, thereby obtaining the same specification of the conductive pads as ball-planting pads of conventional package substrates and avoiding the manufacturing and use of conventional package substrates.

公开(公告)号：US12205906B2

公开(公告)日：2025-01-21

申请号：US18537638

申请日：2023-12-12

Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.

Inventor： Yu-Lung Huang ,  Chee-Key Chung ,  Yuan-Hung Hsu ,  Chi-Jen Chen

IPC: H01L23/00 ,  H01L21/768 ,  H01L23/538

Abstract: An electronic package is provided and includes a plurality of electronic elements, a spacing structure connecting each of the plurality of electronic elements, and a plurality of conductive elements electrically connected to the plurality of electronic elements and serving as external contacts. The spacing structure has a recess to enhance the flexibility of the electronic elements after the electronic elements are connected to one another, thereby preventing the problem of warpage. A method for fabricating the electronic package is also provided.

公开(公告)号：US12176327B2

公开(公告)日：2024-12-24

申请号：US18309756

申请日：2023-04-28

Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.

Inventor： Kong-Toon Ng ,  Hung-Ho Lee ,  Chee-Key Chung ,  Chang-Fu Lin ,  Chi-Hsin Chiu

IPC: H01L25/10 ,  H01L21/56 ,  H01L23/00 ,  H01L25/00

Abstract: An electronic package is provided, including: an encapsulation layer embedded with a first electronic component and conductive pillars; a circuit structure disposed on one surface of the encapsulation layer; a second electronic component disposed on the circuit structure; an insulation layer formed on the other surface of the encapsulation layer; and a circuit portion disposed on the insulation layer. Since the first and second electronic components are disposed on two sides of the circuit structure, respectively, the electronic package has various functions and high performance. A method for fabricating the electronic package is also provided.

公开(公告)号：US11315881B1

公开(公告)日：2022-04-26

申请号：US17122289

申请日：2020-12-15

Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.

Inventor： Chi-Ching Ho ,  Bo-Hao Ma ,  Chee-Key Chung

IPC: H01L23/538 ,  H01L23/00 ,  H01L21/683 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31

Abstract: An electronic package is provided, in which at least one first electronic component is arranged on one surface of a circuit structure with circuit layers and a plurality of second electronic components are arranged on the other surface. The first electronic component can electrically bridge two of the plurality of second electronic components via the circuit layers to replace part of the circuit layers of the circuit structure, so that the circuit layers of the circuit structure can maintain a larger wiring specification and reduce the number of circuit layers, thereby improving the process yield.

公开(公告)号：US11056470B2

公开(公告)日：2021-07-06

申请号：US16513124

申请日：2019-07-16

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Kong-Toon Ng ,  Hung-Ho Lee ,  Chee-Key Chung ,  Chang-Fu Lin ,  Chi-Hsin Chiu

IPC: H01L25/10 ,  H01L21/56 ,  H01L23/00 ,  H01L25/00

Abstract: An electronic package is provided, including: an encapsulation layer embedded with a first electronic component and conductive pillars; a circuit structure disposed on one surface of the encapsulation layer; a second electronic component disposed on the circuit structure; an insulation layer formed on the other surface of the encapsulation layer; and a circuit portion disposed on the insulation layer. Since the first and second electronic components are disposed on two sides of the circuit structure, respectively, the electronic package has various functions and high performance. A method for fabricating the electronic package is also provided.

公开(公告)号：US10741500B2

公开(公告)日：2020-08-11

申请号：US15971534

申请日：2018-05-04

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Chen-Yu Huang ,  Chee-Key Chung ,  Chang-Fu Lin ,  Kong-Toon Ng ,  Rui-Feng Tai ,  Bo-Hao Ma

IPC: H01L23/48 ,  H01L23/538 ,  H01L23/31 ,  H01L23/522 ,  H01L25/065 ,  H01L23/00 ,  H01L25/16

Abstract: An electronic package and a method for fabricating the same are provided. The method includes: forming a circuit structure on an encapsulant; embedding a first electronic component and a plurality of conductive posts in the encapsulant; and disposing a second electronic component on the circuit structure. Since the first and second electronic components are arranged on opposite sides of the circuit structure, the electronic package can provide multi-function and high efficiency.

公开(公告)号：US20200168523A1

公开(公告)日：2020-05-28

申请号：US16533716

申请日：2019-08-06

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Yu-Lung Huang ,  Chee-Key Chung ,  Chang-Fu Lin ,  Kuo-Hua Yu ,  Wen-Shan Tsai ,  En-Li Lin ,  Kaun-I Cheng ,  Wei-Ping Wang

IPC: H01L23/367 ,  H01L23/00 ,  H01L21/48 ,  F28F13/18

Abstract: An electronic package is provided. A heat dissipator is bonded via a thermal interface layer to an electronic component disposed on a carrier. The heat dissipator has a concave-convex structure to increase a heat-dissipating area of the thermal interface layer. Therefore, the heat dissipator has a better heat-dissipating effect.

公开(公告)号：US20200091109A1

公开(公告)日：2020-03-19

申请号：US16691477

申请日：2019-11-21

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Yu-Min Lo ,  Chee-Key Chung ,  Chang-Fu Lin ,  Kuo-Hua Yu ,  Hsiang-Hua Huang

IPC: H01L23/00 ,  H01L21/48

Abstract: The present disclosure provides a method for manufacturing an electronic package, with an electronic component bonded to a carrier structure by means of solder tips formed on conductive bumps, wherein the solder tips do not require a reflow process to be in contact with the carrier structure, thereby allowing the conductive bumps to have an adequate amount of solder tips formed thereon and thus precluding problems such as cracking and collapsing of the solder tips.

公开(公告)号：US20190237374A1

公开(公告)日：2019-08-01

申请号：US15971534

申请日：2018-05-04

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Chen-Yu Huang ,  Chee-Key Chung ,  Chang-Fu Lin ,  Kong-Toon Ng ,  Rui-Feng Tai ,  Bo-Hao Ma

IPC: H01L23/31 ,  H01L23/522 ,  H01L23/00 ,  H01L25/065

Abstract: An electronic package and a method for fabricating the same are provided. The method includes: forming a circuit structure on an encapsulant; embedding a first electronic component and a plurality of conductive posts in the encapsulant; and disposing a second electronic component on the circuit structure. Since the first and second electronic components are arranged on opposite sides of the circuit structure, the electronic package can provide multi-function and high efficiency.

公开(公告)号：US10361150B2

公开(公告)日：2019-07-23

申请号：US15590111

申请日：2017-05-09

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Chee-Key Chung ,  Yu-Min Lo ,  Han-Hung Chen ,  Chang-Fu Lin ,  Fu-Tang Huang

IPC: H01L23/14 ,  H01L23/28 ,  H01L23/31 ,  H01L23/498

Abstract: The disclosure provides a substrate construction applicable to a 3D package, including a silicon substrate for carrying a chip on an upper side thereof, and a circuit structure formed underneath the silicon substrate for being connected to solder balls via conductive pads of the circuit structure, thereby obtaining the same specification of the conductive pads as ball-planting pads of conventional package substrates and avoiding the manufacturing and use of conventional package substrates.