公开(公告)号：US10198683B2

公开(公告)日：2019-02-05

申请号：US15798553

申请日：2017-10-31

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Alexandre Sarafianos ,  Thomas Ordas ,  Yanis Linge ,  Jimmy Fort

IPC: G06K19/073 ,  G06F21/75 ,  G06F21/44 ,  H01L23/00 ,  H03K19/173 ,  H03K17/693

Abstract: An electronic device randomly modifies a current profile of a logic circuit by using an auxiliary circuit. The logic circuit includes a first terminal coupled to a supply voltage terminal, a second terminal coupled to a reference voltage terminal and an output terminal configured to deliver a signal in a high state or a low state. The auxiliary circuit is coupled between the first terminal and the second terminal and is configured to randomly generate or not generate an additional current between the first terminal and the second terminal on each change of state of the signal on the output terminal.

公开(公告)号：US10025559B2

公开(公告)日：2018-07-17

申请号：US15442322

申请日：2017-02-24

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Ibrahima Diop ,  Yanis Linge ,  Pierre-Yvan Liardet

IPC: G06F7/58 ,  G06F7/72 ,  G06F21/72

Abstract: A method of protecting a modular exponentiation calculation on a first number and an exponent, modulo a first modulo, executed by an electronic circuit using a first register or memory location and a second register or memory location, successively including, for each bit of the exponent: generating a random number; performing a modular multiplication of the content of the first register or memory location by that of the second register or memory location, and placing the result in one of the first and second registers or memory locations selected according to the state of the bit of the exponent; performing a modular squaring of the content of one of the first and second registers or memory locations selected according to the state of the exponent, and placing the result in this selected register or memory location, the multiplication and squaring operations being performed modulo the product of the first modulo by said random number.

公开(公告)号：US20180060040A1

公开(公告)日：2018-03-01

申请号：US15442322

申请日：2017-02-24

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Ibrahima Diop ,  Yanis Linge ,  Pierre-Yvan Liardet

IPC: G06F7/72 ,  G06F7/58

CPC classification number: G06F7/723 ,  G06F7/58 ,  G06F7/722 ,  G06F21/72 ,  G06F2207/7247

Abstract: A method of protecting a modular exponentiation calculation on a first number and an exponent, modulo a first modulo, executed by an electronic circuit using a first register or memory location and a second register or memory location, successively including, for each bit of the exponent: generating a random number; performing a modular multiplication of the content of the first register or memory location by that of the second register or memory location, and placing the result in one of the first and second registers or memory locations selected according to the state of the bit of the exponent; performing a modular squaring of the content of one of the first and second registers or memory locations selected according to the state of the exponent, and placing the result in this selected register or memory location, the multiplication and squaring operations being performed modulo the product of the first modulo by said random number.