LIQUID CRYSTAL DISPLAY AND MANUFACTURING METHOD THEREOF
    21.
    发明申请
    LIQUID CRYSTAL DISPLAY AND MANUFACTURING METHOD THEREOF 审中-公开
    液晶显示及其制造方法

    公开(公告)号:US20160202553A1

    公开(公告)日:2016-07-14

    申请号:US14876546

    申请日:2015-10-06

    Abstract: A liquid crystal display includes: a lower display panel including a lower polarizing plate disposed between a lower transparent substrate and a passivation layer of the lower display panel; and an upper display panel including an upper polarizing plate disposed between an upper transparent substrate and a passivation layer of the upper display panel, wherein at least one of the lower polarizing plate and the upper polarizing plate is a reflection type polarizing plate and includes a plurality of linear patterns arranged so as to be extended in one direction and a hydrophobic layer covering at least portion of side wall portions of the linear patterns.

    Abstract translation: 液晶显示器包括:下显示面板,包括设置在下显示面板的下透明基板和钝化层之间的下偏振片; 以及上部显示面板,其具有设置在上部显示面板的上部透明基板和钝化层之间的上部偏振片,其中,所述下偏振片和所述上偏振片中的至少一个为反射型偏振片, 线性图案布置成在一个方向上延伸,并且疏水层覆盖线状图案的侧壁部分的至少一部分。

    THIN FILM TRANSISTOR ARRAY PANEL AND METHOD OF MANUFACTURING THE SAME
    22.
    发明申请
    THIN FILM TRANSISTOR ARRAY PANEL AND METHOD OF MANUFACTURING THE SAME 有权
    薄膜晶体管阵列及其制造方法

    公开(公告)号:US20160197197A1

    公开(公告)日:2016-07-07

    申请号:US14879993

    申请日:2015-10-09

    Abstract: A thin film transistor array panel according to an exemplary embodiment of the present invention includes: an insulating substrate; a polycrystal semiconductor layer formed on the insulating substrate; a buffer layer formed below the polycrystal semiconductor layer and containing fluorine; a gate electrode overlapping the polycrystal semiconductor layer; a source electrode and a drain electrode overlapping the polycrystal semiconductor layer and separated from each other; and a pixel electrode electrically connected to the drain electrode.

    Abstract translation: 根据本发明的示例性实施例的薄膜晶体管阵列面板包括:绝缘基板; 形成在所述绝缘基板上的多晶半导体层; 形成在多晶半导体层下面并含有氟的缓冲层; 与多晶半导体层重叠的栅电极; 源电极和漏电极,与多晶半导体层重叠并分离; 以及电连接到漏电极的像素电极。

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