SCAN DRIVER AND DISPLAY APPARATUS INCLUDING THE SAME

    公开(公告)号:US20220189407A1

    公开(公告)日:2022-06-16

    申请号:US17377293

    申请日:2021-07-15

    IPC分类号: G09G3/3266 G09G3/3258

    摘要: An embodiment of a display apparatus includes a scan driver, a pixel, a first scan line electrically connecting the scan driver to the pixel, a second scan line electrically connecting the scan driver to the pixel, and a third scan line electrically connecting the scan driver to the pixel, wherein in operation: the pixel receives first, second, and third scan signals from the scan driver by way of the first, second, and third scan lines, respectively; the first and second scan signals produce a display period of a frame period in the pixel; and the third scan signal produces a black insertion period of the frame period in the pixel.

    Display device to improve display quality while minimizing bezel area

    公开(公告)号:US11295690B2

    公开(公告)日:2022-04-05

    申请号:US17088182

    申请日:2020-11-03

    摘要: The present disclosure provides a display device. The display device includes a display panel including each of gate lines extending in a first direction, each of sub-gate lines which extends in a second direction crossing the first direction and is electrically connected to the gate line, each of first data lines, each of second data lines, each of first pixels, and each of second pixels, and a driving circuit for providing a gate signal and data signals, wherein a second capacitance between a second drain electrode and a second gate electrode of the second pixel is greater than a first capacitance between a first drain electrode and a first gate electrode of the first pixel.

    Display device and a method of driving a gate driver

    公开(公告)号:US11087691B2

    公开(公告)日:2021-08-10

    申请号:US16720370

    申请日:2019-12-19

    摘要: A display device includes: a display panel including data lines, gate lines, and pixels, the display panel is operated in an active period or in a blank period; and a driving circuit for driving the display panel, the driving circuit including: a signal controller for outputting clock control signals; a voltage generator for receiving the clock control signals, wherein the voltage generator outputs active clock signals synchronized with the clock control signals during the active period and outputs blank clock signals during the blank period; and an overcurrent detection circuit for receiving the clock control signals and the blank clock signals, the overcurrent detection circuit detects an overcurrent of the blank clock signals, and a phase difference between the clock control signals in the active period is different from a phase difference between the clock control signals in the blank period.

    DISPLAY DEVICE WITH STABILIZATION
    24.
    发明申请

    公开(公告)号:US20200066224A1

    公开(公告)日:2020-02-27

    申请号:US16666054

    申请日:2019-10-28

    IPC分类号: G09G3/36

    摘要: A display device to display an image during frame intervals, and to display a blank image during a blank interval defined between the frame intervals, includes: a gate driving circuit including a plurality of stages, an ith stage (i is an integer greater than or equal to 2) from among the plurality of stages including a clock terminal to receive a clock signal, wherein the clock signal swings between a first clock voltage and a second clock voltage smaller than the first clock voltage during a normal interval corresponding to each of the frame intervals, and the clock signal is changed to a voltage lower than the second clock voltage during a stabilization interval corresponding to the blank interval.

    DISPLAY DEVICE
    26.
    发明申请
    DISPLAY DEVICE 审中-公开

    公开(公告)号:US20170084245A1

    公开(公告)日:2017-03-23

    申请号:US15162499

    申请日:2016-05-23

    IPC分类号: G09G3/36

    摘要: A display device to display an image during frame intervals, and to display a blank image during a blank interval defined between the frame intervals, includes: a gate driving circuit including a plurality of stages, an ith stage (i is an integer greater than or equal to 2) from among the plurality of stages including a clock terminal to receive a clock signal, wherein the clock signal swings between a first clock voltage and a second clock voltage smaller than the first clock voltage during a normal interval corresponding to each of the frame intervals, and the clock signal is changed to a voltage lower than the second clock voltage during a stabilization interval corresponding to the blank interval.