公开(公告)号：US10666786B2

公开(公告)日：2020-05-26

申请号：US16074866

申请日：2017-01-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jin-Young Kim ,  Sung-Jae Park ,  Eun-Young Lee

IPC: H04M1/725 ,  G06F9/451 ,  G06F3/0484 ,  G06F3/0488 ,  G08C17/02 ,  H04L12/28 ,  H04W4/12

Abstract: A method for controlling an external electronic device of an electronic device, according to various embodiments, comprises the steps of: receiving data information corresponding to at least one function of the external electronic device from an external electronic device connected to the electronic device; displaying a setting window for setting a user interface for controlling the external electronic device using the data information; selecting a control item corresponding to the at least one function included in the setting window according to user input reception; and setting and displaying the user interface corresponding to the selected control item. Other embodiments are possible.

公开(公告)号：US09716095B2

公开(公告)日：2017-07-25

申请号：US14534853

申请日：2014-11-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jin-Young Kim

IPC: H01L21/8242 ,  H01L27/108

CPC classification number: H01L27/10814 ,  H01L27/10823 ,  H01L27/10876 ,  H01L27/10885 ,  H01L27/10888 ,  H01L27/10894 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device includes a substrate having a field region disposed therein that defines an active region of the substrate, the active region comprising a pillar-shaped bit line contact region having an upper surface disposed at a higher level than an upper surface of the field region. An interlayer insulating layer is disposed on the substrate and covers the field region. A bit line is disposed in a trench in the interlayer insulating layer above the pillar-shaped bit line contact region and electrically connected thereto.

公开(公告)号：US20140022831A1

公开(公告)日：2014-01-23

申请号：US13945418

申请日：2013-07-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jin-Young Kim ,  Min-Gu Kang ,  Jae-Yun Lee ,  Beak-Hyung Cho

IPC: G11C5/06

CPC classification number: G11C5/06 ,  G11C7/12 ,  G11C7/18

Abstract: A semiconductor memory device includes a plurality of functional bit lines, at least one dummy bit line, and a dummy bit line selection unit. The at least one dummy bit line is adjacent to an outermost bit line of the functional bit lines. The dummy bit line selection unit activates the at least one dummy bit line in response to a selection control signal of one of the plurality of functional bit lines that is not adjacent to the at least one dummy bit line. The semiconductor memory device may ensure a photo margin, so that the pattern size of the functional bit lines can be made uniform.

Abstract translation: 半导体存储器件包括多个功能位线，至少一个虚拟位线和虚拟位线选择单元。 至少一个虚拟位线与功能位线的最外位线相邻。 所述虚拟位线选择单元响应于与所述至少一个虚拟位线不相邻的所述多个功能位线之一的选择控制信号来激活所述至少一个虚拟位线。 半导体存储器件可以确保照相余量，使得功能位线的图案尺寸可以均匀。